Inventor

Shih-Jye Shen

Inventor
Hsinchu, TW

Overview

35→
Patents
2003–2013
Patent span
Electricity
Primary field (CPC H)

Patents· 35 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Bprimary
H10BElectronic memory devices42%
G11CStatic stores35%
H10DInorganic electric semiconductor devices21%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
PatentTitleYear
8,497,172'Method of manufacturing a read-only memory device with contacts formed therein'20138,466,519'Read-only memory device with contacts formed therein'20137,960,792'Non-volatile memory with a stable threshold voltage on SOI substrate'20117,903,472'Operating method of non-volatile memory'20117,855,417'Non-volatile memory with a stable threshold voltage on SOI substrate'20107,768,059'Nonvolatile single-poly memory device'20107,682,908'Non-volatile memory and operating method thereof'20107,551,494'Single-poly non-volatile memory device and its operation method'20097,447,082'Method for operating single-poly non-volatile memory device'20087,433,243'Operation method of non-volatile memory'20087,417,897'Method for reading a single-poly single-transistor non-volatile memory cell'20087,262,457'Non-volatile memory cell'20077,250,654'Non-volatile memory device'20077,190,623'Non-volatile memory cell and method of operating the same'20077,172,940'Method of fabricating an embedded non-volatile memory device'20076,975,545'Non-volatile memory cell'20056,922,363'Method for operating a NOR-array memory module composed of P-type memory cells'20056,920,067'Integrated circuit embedded with single-poly non-volatile memory'20056,914,825'Semiconductor memory device having improved data retention'20056,888,190'EEPROM with source line voltage stabilization mechanism'20056,885,587'Single poly embedded EPROM'20056,882,574'Single poly UV-erasable programmable read only memory'20056,847,087'Bi-directional Fowler-Nordheim tunneling flash memory'20056,842,374'Method for operating N-channel electrically erasable programmable logic device'20056,829,166'Method for controlling a non-volatile dynamic random access memory'20046,822,286'Cmos-compatible read only memory and method for fabricating the same'20046,819,594'Electrically erasable programmable logic device'20046,812,083'Fabrication method for non-volatile memory'20046,770,950'Non-volatile semiconductor memory structure'20046,750,504'Low voltage single-poly flash memory cell and array'20046,740,556'Method for forming EPROM with low leakage'20046,711,064'Single-poly EEPROM'20046,678,190'Single poly embedded eprom'20046,617,637'Electrically erasable programmable logic device'20036,504,763'Nonvolatile semiconductor memory capable of random programming'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2013Patents assigned to EMEMORY TECHNOLOGY INC (35)· patent assignee history
2003–2013Based in Hsinchu, TW· patent location history
2013Patents assigned to HSU CHING-HSIANG (2)· patent assignee history
2013Patents assigned to SHEN SHIH-JYE (2)· patent assignee history
2013Patents assigned to YANG CHING-SUNG (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
EMEMORY TECHNOLOGY INC352003–2013
HSU CHING-HSIANG22013
SHEN SHIH-JYEself22013
YANG CHING-SUNG22013
Locations
LocationPatentsSpan
Hsinchu, TW352003–2013