Inventor
Masaru Akino
Inventor
Chiba, JP
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices33%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1033%
H10DInorganic electric semiconductor devices9%
G01RMeasuring electric variables7%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
B29CShaping or joining of plastics4%
B29KIndexing scheme associated with subclasses b29b, b29c or b29d, relating to moulding materials or to materials for moulds, reinforcements, fillers or preformed parts, e.g. inserts4%
B29LIndexing scheme associated with subclass b29c, relating to particular articles4%
PatentTitleYear
11,043,434Method of manufacturing a semiconductor device202110,978,414Semiconductor device and method of manufacturing a semiconductor device202110,607,954Semiconductor device and method of manufacturing a semiconductor device202010,580,708Method of manufacturing a semiconductor device and semiconductor device202010,388,618Semiconductor device and method of manufacturing a semiconductor device201910,297,562Semiconductor device and method of manufacturing a semiconductor device201910,249,584Semiconductor device and method of manufacturing a semiconductor device20199,945,912Hall sensor and compensation method for offset caused by temperature distribution in hall sensor20189,917,055'Semiconductor device having fuse element'20189,818,691'Semiconductor device having a fuse element'20179,694,523'Semiconductor manufacturing apparatus'20179,679,835'Method of manufacturing resin-encapsulated semiconductor device, and lead frame'20179,437,669'Semiconductor device'20169,362,195'Semiconductor device'20169,296,142'Semiconductor manufacturing apparatus'20169,184,116'Method of manufacturing resin-encapsulated semiconductor device, and lead frame'20159,117,799'Method of manufacturing semiconductor device having pad region for wire-bonding'20158,704,385'Semiconductor device having pad region for wire-bonding and method of manufacturing the semiconductor device'20148,324,708'Semiconductor integrated circuit device and manufacturing method thereof'2012Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2012–2018Patents assigned to SEIKO INSTR INC (9)· patent assignee history
2012–2014Patents assigned to AKINO MASARU (2)· patent assignee history
2012Patents assigned to MINAMI YUKIMASA (1)· patent assignee history
2012–2021Based in Chiba, JP· patent location history
2016–2018Patents assigned to SII SEMICONDUCTOR CORP (6)· patent assignee history
2019–2021Patents assigned to ABLIC INC (7)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SEIKO INSTR INC | 9 | 2012–2018 |
| ABLIC INC | 7 | 2019–2021 |
| SII SEMICONDUCTOR CORP | 6 | 2016–2018 |
| AKINO MASARUself | 2 | 2012–2014 |
| MINAMI YUKIMASA | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chiba, JP | 19 | 2012–2021 |