Inventor
Lloyd A. Walls
Inventor
Austin, TX, US
Overview
Patents· 39 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H05Kprimary
H05KPrinted circuits14%
H04LTransmission of digital information, e.g. telegraphic communication13%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
Y10TTechnical subjects covered by former us classification10%
H03KPulse technique8%
G01RMeasuring electric variables7%
G06FElectric digital data processing6%
H04BTransmission6%
G01KMeasuring temperature4%
H01PWaveguides4%
PatentTitleYear
10,795,573Method and apparatus for virtual braille keyboard202010,705,134High speed chip substrate test fixture202010,620,253Noise modulation for on-chip noise measurement202010,542,618Printed circuit board with routing of a conductor and dielectric strands20209,893,400'Method for performing frequency band splitting'20189,835,665Noise modulation for on-chip noise measurement20179,797,938'Noise modulation for on-chip noise measurement'20179,548,769'Reduced wiring requirements with signal slope manipulation'20179,536,604'Impedance matching system for DDR memory'20179,368,852'Method for performing frequency band splitting'20169,253,874'Printed circuit board having DC blocking dielectric waveguide vias'20169,209,583'Multi-level connector and use thereof that mitigates data signaling reflections'20159,118,144'Multi-level connector and use thereof that mitigates data signaling reflections'20158,743,558'Reduced wiring requirements with signal slope manipulation'20148,722,536'Fabrication method for circuit substrate having post-fed die side power supply connections'20148,716,851'Continuously referencing signals over multiple layers in laminate packages'20148,586,476'Fabrication method for circuit substrate having post-fed die side power supply connections'20138,425,115'Multi-layered thermal sensor for integrated circuits and other layered structures'20138,358,509'Reduced wiring requirements with signal slope manipulation'20138,158,461'Continuously referencing signals over multiple layers in laminate packages'20127,946,763'Multi-layered thermal sensor for integrated circuits and other layered structures'20117,863,724'Circuit substrate having post-fed die side power supply connections'20117,510,323'Multi-layered thermal sensor for integrated circuits and other layered structures'20097,095,788'Circuit for facilitating simultaneous multi-directional transmission of multiple signals between multiple circuits using a single transmission line'20066,771,675'Method for facilitating simultaneous multi-directional transmission of multiple signals between multiple circuits using a single transmission line'20046,337,884'Circuitry for allowing two drivers to communicate with two receivers using one transmission line'20025,864,584'Circuitry for allowing two drivers to communicate with two receivers using one transmission line'19995,789,937'Impedence self-adjusting driver circuit'19985,770,969'Controllable decoupling capacitor'19985,761,246'Circuit for multiplexing a plurality of signals on one transmission line between chips'19985,663,663'Mixed voltage interface converter'19975,635,761'Internal resistor termination in multi-chip module environments'19975,541,534'Mixed voltage interface converter'19965,541,535'CMOS simultaneous transmission bidirectional driver/receiver'19965,534,812'Communication between chips having different voltage levels'19965,530,377'Method and apparatus for active termination of a line driver/receiver'19965,506,457'Electronic switch for decoupling capacitor'19964,862,077'Probe card apparatus and method of providing same with reconfigurable probe card circuitry'19894,459,609'Charge-stabilized memory'1984Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1984–2020Patents assigned to IBM (39)· patent assignee history
1984Based in Fairfax, VT, US· patent location history
1989Based in Williston, VT, US· patent location history
1996–2020Based in Austin, TX, US· patent location history
2012–2015Patents assigned to WALLS LLOYD A (7)· patent assignee history
2012–2014Patents assigned to PREDA FRANCESCO (3)· patent assignee history
2013–2014Patents assigned to BILLS KEVIN J (2)· patent assignee history
2013–2014Patents assigned to BOHRA MAHESH (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 39 | 1984–2020 |
| WALLS LLOYD Aself | 7 | 2012–2015 |
| PREDA FRANCESCO | 3 | 2012–2014 |
| BILLS KEVIN J | 2 | 2013–2014 |
| BOHRA MAHESH | 2 | 2013–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 37 | 1996–2020 |
| Williston, VT, US | 1 | 1989 |
| Fairfax, VT, US | 1 | 1984 |