Inventor
David A. Pierce
Inventor
Wheaton, IL, US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing22%
G01RMeasuring electric variables8%
H04LTransmission of digital information, e.g. telegraphic communication8%
H04QSelecting8%
B22FWorking metallic powder6%
B29CShaping or joining of plastics6%
D21JFibreboard6%
G11CStatic stores6%
H04JMultiplex communication6%
H04WWireless communication networks6%
PatentTitleYear
10,801,164Tool or tool part, system including such a tool or tool part, method of producing such a tool or tool part and method of molding a product from a pulp slurry202010,585,747Detecting single event upsets and stuck-at faults in RAM-based data path controllers202010,435,848Tool or tool part, system including such a tool or tool part, method of producing such a tool or tool part and method of molding a product from a pulp slurry201910,169,145Read buffer architecture supporting integrated XOR-reconstructed and read-retry for non-volatile random access memory (NVRAM) systems201910,102,058Detecting single event upsets and stuck-at faults in RAM-based data path controllers20189,575,834'Detecting single event upsets and stuck-at faults in RAM-based data path controllers'20179,298,549'Read buffer architecture supporting integrated XOR-reconstructed and read-retry for non-volatile random access memory (NVRAM) systems'20168,823,561'In-system reconfigurable circuit for mapping data words of different lengths'20148,165,164'In-system reconfigurable circuit for mapping data words of different lengths'20127,858,015'Beverage container insulators and methods for making the same'20107,743,296'Logic analyzer systems and methods for programmable logic devices'20107,606,851'Correlator having user-defined processing'20097,536,615'Logic analyzer systems and methods for programmable logic devices'20096,651,038'Architecture for simulation testbench control'20036,256,770'Register transfer level (RTL) based scan insertion for integrated circuit design processes'20015,519,764'Circuit and method for detecting error causing tones in a voice messaging system'19964,821,259'Control information communication arrangement for a distributed control switching system'19894,780,870'Packet switch'19884,751,697'Distributed packet switching sytem'1988Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1988–1989Patents assigned to AMERICAN TELEPHONE & TELEGRAPH (3)· patent assignee history
1988–2014Based in Wheaton, IL, US· patent location history
1996Based in Phoenix, AZ, US· patent location history
2009–2014Patents assigned to LATTICE SEMICONDUCTOR CORP (5)· patent assignee history
2010Based in Renton, WA, US· patent location history
2012–2014Patents assigned to HAMMER MICHAEL (2)· patent assignee history
2016–2020Patents assigned to IBM (5)· patent assignee history
2016–2020Based in Houston, TX, US· patent location history
2019–2020Patents assigned to CELWISE AB (2)· patent assignee history
2019–2020Based in Norrkoping, SE· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 5 | 2016–2020 |
| LATTICE SEMICONDUCTOR CORP | 5 | 2009–2014 |
| AMERICAN TELEPHONE & TELEGRAPH | 3 | 1988–1989 |
| CELWISE AB | 2 | 2019–2020 |
| HAMMER MICHAEL | 2 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Wheaton, Illinois, US | 10 | 1988–2014 |
| Houston, Texas, US | 5 | 2016–2020 |
| Norrkoping, SE | 2 | 2019–2020 |
| Renton, Washington, US | 1 | 2010 |
| Phoenix, AZ, US | 1 | 1996 |