Inventor

Larry D. Hewitt

Inventor

Austin, TX, US

Overview

79→

Patents

1996–2021

Patent span

Physics

Primary field (CPC G)

Patents· 79 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing54%

G10HElectrophonic musical instruments10%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use9%

H03KPulse technique8%

H04LTransmission of digital information, e.g. telegraphic communication6%

G01KMeasuring temperature2%

G01RMeasuring electric variables2%

H03MCoding2%

G05FSystems for regulating electric or magnetic variables1%

G06JHybrid computing arrangements1%

PatentTitleYear

11,073,888Platform power manager for rack level power and thermal constraints2021 10,895,901Method and apparatus for data scrambling2021 10,170,994Voltage regulators for an integrated circuit chip2019 10,120,430Dynamic reliability quality monitoring2018 8,244,950'Buffering non-posted read commands and responses'2012 7,986,727'In-band method to configure equalization levels'2011 7,983,181'Technique for negotiating a width of a packet-based communication link'2011 7,617,404'In-band power management in a communication link'2009 7,607,031'Power management in a communication link'2009 7,455,450'Method and apparatus for temperature sensing in integrated circuits'2008 7,451,337'Guaranteed edge synchronization for multiple clocks'2008 7,421,525'System including a host connected to a plurality of memory modules via a serial memory interconnect'2008 7,334,123'Computer system including a bus bridge for connection to a security services processor'2008 7,308,514'Configuring a communication link interface'2007 7,231,474'Serial interface having a read temperature command'2007 7,180,380'Zoned thermal monitoring'2007 7,174,467'Message based power management in a multi-processor system'2007 7,146,510'Use of a signal line to adjust width and/or frequency of a communication link during system operation'2006 7,051,218'Message based power management'2006 7,000,149'External loopback test mode'2006 6,928,528'Guaranteed data synchronization'2005 6,865,618'System and method of assigning device numbers to I/O nodes of a computer system'2005 6,862,647'System and method for analyzing bus transactions'2005 6,857,033'I/O node for a computer system including an integrated graphics engine and an integrated I/O hub'2005 6,807,599'Computer system I/O node for connection serially in a chain to a host'2004 6,791,554'I/O node for a computer system including an integrated graphics engine'2004 6,725,297'Peripheral interface circuit for an I/O node of a computer system'2004 6,697,890'I/O node for a computer system including an integrated I/O interface'2004 6,618,782'Computer interconnection bus link layer'2003 6,611,891'Computer resource configuration mechanism across a multi-pipe communication link'2003 6,571,332'Method and apparatus for combined transaction reordering and buffer management'2003 6,557,048'Computer system implementing a system and method for ordering input/output (IO) memory operations within a coherent portion thereof'2003 6,532,019'Input/output integrated circuit hub incorporating a RAMDAC'2003 6,389,526'Circuit and method for selectively stalling interrupt requests initiated by devices coupled to a multiprocessor system'2002 6,385,705'Circuit and method for maintaining order of memory access requests initiated by devices in a multiprocessor system'2002 6,370,600'Staging buffer for translating clock domains when source clock frequency exceeds target clock frequency'2002 6,339,808'Address space conversion to retain software compatibility in new architectures'2002 6,272,465'Monolithic PC audio circuit'2001 6,253,304'Collation of interrupt control devices'2001 6,202,116'Write only bus with whole and half bus mode operation'2001 6,199,132'Communication link with isochronous and asynchronous priority modes'2001 6,173,348'Using a control line to insert a control message during a data transfer on a bus'2001 6,167,492'Circuit and method for maintaining order of memory access requests initiated by devices coupled to a multiprocessor system'2000 6,151,651'Communication link with isochronous and asynchronous priority modes coupling bridge circuits in a computer system'2000 6,148,357'Integrated CPU and memory controller utilizing a communication link having isochronous and asynchronous priority modes'2000 6,119,194'Method and apparatus for monitoring universal serial bus activity'2000 6,100,461'Wavetable cache using simplified looping'2000 6,085,330'Control circuit for switching a processor between multiple low power states to allow cache snoops'2000 6,058,066'Enhanced register array accessible by both a system microprocessor and a wavetable audio synthesizer'2000 6,032,211'Method of mode control in a bus optimized for personal computer data traffic'2000 5,987,541'Computer system using signal modulation techniques to enhance multimedia device communication'1999 5,964,883'Arrangement and method for handling bus clock speed variations'1999 5,956,493'Bus arbiter including programmable request latency counters for varying arbitration priority'1999 5,918,073'System and method for equalizing data buffer storage and fetch rates of peripheral devices'1999 5,901,333'Vertical wavetable cache architecture in which the number of queues is substantially smaller than the total number of voices stored in the system memory'1999 5,898,892'Computer system with a data cache for providing real-time multimedia data to a multimedia engine'1999 5,898,886'Multimedia devices in computer system that selectively employ a communications protocol by determining the presence of the quaternary interface'1999 5,896,291'Computer system and method for implementing delay-based effects using system memory'1999 5,870,622'Computer system and method for transferring commands and data to a dedicated multimedia engine'1999 5,859,995'Method and apparatus for coordinating combinatorial logic-clocked state machines'1999 5,847,304'PC audio system with frequency compensated wavetable data'1998 5,812,800'Computer system which includes a local expansion bus and a dedicated real-time bus and including a multimedia memory for increased multi-media performance'1998 5,809,466'Audio processing chip with external serial port'1998 5,797,028'Computer system having an improved digital and analog configuration'1998 5,796,851'Digital method to eliminate power-on pops and clicks'1998 5,794,021'Variable frequency clock generation circuit using aperiodic patterns'1998 5,790,811'System and method for performing data transfers during PCI idle clock cycles'1998 5,784,650'System for increasing multimedia performance and other real time applications by including a local expansion bus and a multimedia bus on the computer system motherboard'1998 5,784,592'Computer system which includes a local expansion bus and a dedicated real-time bus for increased multimedia performance'1998 5,761,434'Digital audio system including a software controlled phase lock loop for synchronizing audio sources to a common clock source'1998 5,758,177'Computer system having separate digital and analog system chips for improved performance'1998 5,753,841'PC audio system with wavetable cache'1998 5,748,983'Computer system having a dedicated multimedia engine and multimedia memory having arbitration logic which grants main memory access to either the CPU or multimedia engine'1998 5,732,224'Computer system having a dedicated multimedia engine including multimedia memory'1998 5,692,211'Computer system and method having a dedicated multimedia engine and including separate command and data paths'1997 5,675,808'Power control of circuit modules within an integrated circuit'1997 5,668,338'Wavetable audio synthesizer with low frequency oscillators for tremolo and vibrato effects'1997 5,659,466'Monolithic PC audio circuit with enhanced digital wavetable audio synthesizer'1997 5,546,039'Charge dissipation in capacitively loaded ports'1996

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1996–2021Patents assigned to ADVANCED MICRO DEVICES INC (75)· patent assignee history

1996–2021Based in Austin, TX, US· patent location history

1998Patents assigned to ADVANCED MICROSYSTEMS INC (1)· patent assignee history

1998Patents assigned to AVANCED MICRO DEVICES INC (1)· patent assignee history

1999Based in Travis, TX, US· patent location history

2012Patents assigned to BARTH FRANK (1)· patent assignee history

2018–2021Patents assigned to ATI TECHNOLOGIES ULC (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
ADVANCED MICRO DEVICES INC	75	1996–2021
ATI TECHNOLOGIES ULC	3	2018–2021
ADVANCED MICROSYSTEMS INC	1	1998
AVANCED MICRO DEVICES INC	1	1998
BARTH FRANK	1	2012

Locations

Location	Patents	Span
Austin, Texas, US	78	1996–2021
Travis, Texas, US	1	1999