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Inventor

Tung-Sheng Hsiao

Inventor
New Taipei, TW

Overview

3→
Patents
2015–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 3 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Bprimary
H10BElectronic memory devices27%
H01LSemiconductor devices18%
H10NElectric solid-state devices not otherwise provided for18%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1018%
H10DInorganic electric semiconductor devices9%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h109%
PatentTitleYear
10,763,426Method for forming a flat bottom electrode via (BEVA) top surface for memory202010,566,519Method for forming a flat bottom electrode via (BEVA) top surface for memory20208,951,864'Split-gate device and method of fabricating the same'2015

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2015Patents assigned to HSIAO TUNG-SHENG (1)· patent assignee history
2015Patents assigned to HSIEH CHIH-REN (1)· patent assignee history
2015Patents assigned to TAIWAN SEMICONDUCTOR MFG (1)· patent assignee history
2015Patents assigned to WANG YU-HSIUNG (1)· patent assignee history
2015–2020Based in New Taipei, TW· patent location history
2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD22020
HSIAO TUNG-SHENGself12015
HSIEH CHIH-REN12015
TAIWAN SEMICONDUCTOR MFG12015
WANG YU-HSIUNG12015
Locations
LocationPatentsSpan
New Taipei, TW32015–2020