Inventor
Sing P. Tay
Inventor
Fremont, CA, US
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1038%
H10DInorganic electric semiconductor devices17%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests9%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
H01JElectric discharge tubes or discharge lamps4%
H05BElectric heating4%
B44DPainting or artistic drawing, not otherwise provided for2%
C23CCoating metallic material2%
C30BSingle-crystal growth2%
PatentTitleYear
8,236,706'Method and apparatus for growing thin oxide films on silicon while minimizing impact on existing structures'20127,977,258'Method and system for thermally processing a plurality of wafer-shaped objects'20117,151,060'Device and method for thermally treating semiconductor wafers'20066,706,643'UV-enhanced oxy-nitridation of semiconductor substrates'20046,707,011'Rapid thermal processing system for integrated circuits'20046,600,138'Rapid thermal processing system for integrated circuits'20036,451,713'UV pretreatment process for ultra-thin oxynitride formation'20026,403,923'System for controlling the temperature of a reflective substrate during rapid heating'20026,359,263'System for controlling the temperature of a reflective substrate during rapid heating'20026,303,524'High temperature short time curing of low dielectric constant materials using rapid thermal processing techniques'20016,204,484'System for measuring the temperature of a semiconductor wafer during thermal processing'20016,200,023'Method for determining the temperature in a thermal processing chamber'20016,075,922'Process for preventing gas leaks in an atmospheric thermal processing chamber'20005,773,871'Integrated circuit structure and method of fabrication thereof'19985,726,084'Method for forming integrated circuit structure'19985,516,710'Method of forming a transistor'19965,362,669'Method of making integrated circuits'19945,352,923'Trench resistors for integrated circuits'19945,316,978'Forming resistors for intergrated circuits'19945,296,258'Method of forming silicon carbide'19944,996,081'Method of forming multiple nitride coating on silicon'19914,968,641'Method for formation of an isolating oxide layer'19904,859,303'Method and apparatus for removing coating from substrate'19894,836,902'Method and apparatus for removing coating from substrate'1989Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1989–1998Patents assigned to NORTHERN TELECOM LTD (9)· patent assignee history
1989–1998Based in Nepean, CA· patent location history
1990–1991Patents assigned to ELLUL JOSEPH P (2)· patent assignee history
1990Patents assigned to ABBOTT ROGER S (1)· patent assignee history
2000–2002Patents assigned to STEAG RTP SYSTEMS INC (4)· patent assignee history
2000–2012Based in Fremont, CA, US· patent location history
2002–2012Patents assigned to MATTSON TECH INC (7)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NORTHERN TELECOM LTD | 9 | 1989–1998 |
| MATTSON TECH INC | 7 | 2002–2012 |
| STEAG RTP SYSTEMS INC | 4 | 2000–2002 |
| ELLUL JOSEPH P | 2 | 1990–1991 |
| ABBOTT ROGER S | 1 | 1990 |
Locations
| Location | Patents | Span |
|---|---|---|
| Fremont, California, US | 13 | 2000–2012 |
| Nepean, CA | 11 | 1989–1998 |