Inventor

Clement Hsingjen Wann

Inventor

Carmel, NY, US

Overview

2011–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 240 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices32%

H01LSemiconductor devices27%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1022%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%

G06FElectric digital data processing1%

G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%

C01BNon-metallic elements0%

H01GCapacitors0%

B82YSpecific uses or applications of nanostructures0%

PatentTitleYear

11,133,222Method for manufacturing semiconductor structure2021 11,080,453Integrated circuit fin layout method, system, and structure2021 11,075,108Mechanism for FinFET well doping2021 10,978,451Complimentary metal-oxide-semiconductor (CMOS) with low contact resistivity and method of forming same2021 10,971,594Semiconductor device having modified profile metal gate2021 10,943,995Self-aligned passivation of active regions2021 10,916,469Systems and methods for a semiconductor structure having multiple semiconductor-device layers2021 10,879,235Inter-level connection for multi-layer structures2020 10,879,065III-V compound semiconductors in isolation regions and method forming same2020 10,854,708Capacitor having multiple graphene structures2020 10,847,636Methods for forming semiconductor structure2020 10,804,163Method of metal gate formation and structures formed by the same2020 10,797,156Method of forming the gate electrode of field effect transistor2020 10,797,162FinFET device having a channel defined in a diamond-like shape semiconductor structure2020 10,734,411Systems and methods for a semiconductor structure having multiple semiconductor-device layers2020 10,727,351Semiconductor structures and methods with high mobility and high energy bandgap materials2020 10,665,674FinFET semiconductor device with germanium diffusion over silicon fins2020 10,651,091Wrap-around contact on FinFET2020 10,622,261FinFET devices with unique shape and the fabrication thereof2020 10,535,573System and method for test key characterizing wafer processing state2020 10,515,846Systems and methods for a semiconductor structure having multiple semiconductor-device layers2019 10,516,031Method of forming the gate electrode of field effect transistor2019 10,510,827Capacitor having multiple graphene structures2019 10,510,754Complimentary metal-oxide-semiconductor (CMOS) with low contact resistivity and method of forming same2019 10,504,993FinFET semiconductor device with germanium diffusion over silicon fins2019 10,418,456Method of fabricating a semiconductor device having modified profile metal gate2019 10,355,108Method of forming a fin field effect transistor comprising two etching steps to define a fin structure2019 10,333,001Fin structure of FinFET2019 10,326,021Source/drain profile for FinFeT2019 10,304,826Complimentary metal-oxide-semiconductor (CMOS) with low contact resistivity and method of forming same2019 10,297,492Mechanism for FinFET well doping2019 10,269,969Semiconductor structures and methods with high mobility and high energy bandgap materials2019 10,269,970Gradient ternary or quaternary multiple-gate transistor2019 10,269,628FinFET low resistivity contact formation method2019 10,269,666System and method for test key characterizing wafer processing state2019 10,269,649Wrap-around contact on FinFET2019 10,263,097Method of semiconductor arrangement formation2019 10,186,602Fin structure of semiconductor device2019 10,170,375FinFET devices with unique fin shape and the fabrication thereof2019 10,164,062FinFET device having a channel defined in a diamond-like shape semiconductor structure2018 10,164,023FinFETs with strained well regions2018 10,164,070Self-aligned passivation of active regions2018 10,163,897Inter-level connection for multi-layer structures2018 10,158,015FinFETs with strained well regions2018 10,128,269Systems and methods for a semiconductor structure having multiple semiconductor-device layers2018 10,115,597Self-aligned dual-metal silicide and germanide formation2018 10,115,826Semiconductor structure and the manufacturing method thereof2018 10,109,748High-mobility multiple-gate transistor with improved on-to-off current ratio2018 10,096,710Method of forming strained structures of semiconductor devices2018 10,062,601Systems and methods for a semiconductor structure having multiple semiconductor-device layers2018 10,050,104Capacitor having a graphene structure, semiconductor device including the capacitor and method of forming the same2018 10,043,908Contact structure of semiconductor device2018 10,032,889Self-aligned passivation of active regions2018 10,026,641Isolation structure of semiconductor device2018 10,020,189Growing a III-V layer on silicon using aligned nano-scale patterns2018 9,985,131Source/drain profile for FinFET2018 9,978,630Curved wafer processing method and apparatus2018 9,941,367Wrap-around contact on FinFET2018 9,929,133'Semiconductor logic circuits fabricated using multi-layer structures'2018 9,929,272'Fin structure of FinFET'2018 9,929,158'Systems and methods for integrating different channel materials into a CMOS circuit by using a semiconductor structure having multiple transistor layers'2018 9,922,827'Method of forming a semiconductor structure'2018 9,899,496'Method of making a finFET device'2018 9,893,160'Methods of forming gate dielectric material'2018 9,887,274'FinFETs and methods for forming the same'2018 9,887,290'Silicon germanium source/drain regions'2018 9,870,920'Growing III-V compound semiconductors from trenches filled with intermediate layers'2018 9,870,956'FinFETs with nitride liners and methods of forming the same'2018 9,859,380'FinFETs with strained well regions'2018 9,831,322Channel epitaxial regrowth flow (CRF)2017 9,812,551'Method of forming the gate electrode of field effect transistor'2017 9,786,543'Isolation structure of semiconductor device'2017 9,780,174'Methods for forming semiconductor regions in trenches'2017 9,780,216'Combination FinFET and methods of forming same'2017 9,773,809'Systems and methods for a semiconductor structure having multiple semiconductor-device layers'2017 9,773,889'Method of semiconductor arrangement formation'2017 9,768,305'Gradient ternary or quaternary multiple-gate transistor'2017 9,748,388'Method of forming strained structures of semiconductor devices'2017 9,748,143'FinFETs with strained well regions'2017 9,698,060'Germanium FinFETs with metal gates and stressors'2017 9,673,292'Semiconductor device having modified profile metal gate'2017 9,646,872'Systems and methods for a semiconductor structure having multiple semiconductor-device layers'2017 9,634,001'System and methods for converting planar design to FinFET design'2017 9,627,539'Replacement channels for semiconductor devices and methods for forming the same using dopant concentration boost'2017 9,627,280'Methods for probing semiconductor fins through four-point probe and determining carrier concentrations'2017 9,607,826'Semiconductor device manufacturing methods and methods of forming insulating material layers'2017 9,601,342'FinFETs with strained well regions'2017 9,601,594'Semiconductor device with enhanced strain'2017 9,601,328'Growing a III-V layer on silicon using aligned nano-scale patterns'2017 9,595,614'Semiconductor structures and methods with high mobility and high energy bandgap materials'2017 9,589,803'Gate electrode of field effect transistor'2017 9,590,068'High-mobility multiple-gate transistor with improved on-to-off current ratio'2017 9,589,838'Contact structure of semiconductor device'2017 9,583,379'Inverted trapezoidal recess for epitaxial growth'2017 9,577,071'Method of making a strained structure of a semiconductor device'2017 9,559,182'Self-aligned dual-metal silicide and germanide formation'2017 9,553,012'Semiconductor structure and the manufacturing method thereof'2017 9,553,149'Semiconductor device with a strained region and method of making'2017 9,553,025'Selective Fin-shaping process'2017 9,548,303'FinFET devices with unique fin shape and the fabrication thereof'2017 9,543,417'High mobility devices and methods of forming same'2017 9,543,301'Fin-last FinFET and methods of forming same'2017 9,530,710'Passivation structure of fin field effect transistor'2016 9,530,776'FinFET semiconductor device with germanium diffusion over silicon fins'2016 9,525,049'Method for fabricating fin field effect transistors'2016 9,508,849'Device having source/drain regions regrown from un-relaxed silicon layer'2016 9,502,539'FINFET device having a channel defined in a diamond-like shape semiconductor structure'2016 9,484,462'Fin structure of fin field effect transistor'2016 9,472,652'Fin structure of semiconductor device'2016 9,472,672'Eliminating fin mismatch using isolation last'2016 9,461,069'Systems and methods for integrating different channel materials into a CMOS circuit by using a semiconductor structure having multiple transistor layers'2016 9,455,320'FinFETs with strained well regions'2016 9,455,325'Fin field-effect transistors having controlled fin height'2016 9,443,769'Wrap-around contact'2016 9,443,869'Systems and methods for a semiconductor structure having multiple semiconductor-device layers'2016 9,443,964'Fin structure of FinFet'2016 9,431,288'System and method for test key characterizing wafer processing state'2016 9,412,847'Self-aligned passivation of active regions'2016 9,406,546'Mechanism for FinFET well doping'2016 9,391,203'Channel epitaxial regrowth flow (CRF)'2016 9,390,982'CMOS devices with reduced leakage and methods of forming the same'2016 9,385,208'Semiconductor device having high-K gate dielectric layer'2016 9,379,108'Contact structure of semiconductor device'2016 9,373,549'Semiconductor device and method of forming the same'2016 9,368,446'Self aligned contact formation'2016 9,362,123'Structure and method for integrated devices on different substartes with interfacial engineering'2016 9,349,841'FinFETs and methods for forming the same'2016 9,349,659'Methods for probing semiconductor fins and determining carrier concentrations therein'2016 9,337,285'Contact structure of semiconductor device'2016 9,337,103'Method for removing hard mask oxide and making gate structure of semiconductor devices'2016 9,337,304'Method of making semiconductor device'2016 9,330,970'Structure and method for high performance interconnect'2016 9,299,587'Microwave anneal (MWA) for defect recovery'2016 9,263,252'Method of protecting an interlayer dielectric layer and structure formed thereby'2016 9,257,349'Method of scavenging impurities in forming a gate stack having an interfacial layer'2016 9,257,343'Method for fabricating fin field effect transistors'2016 9,246,004'Strained structures of semiconductor devices'2016 9,245,805'Germanium FinFETs with metal gates and stressors'2016 9,245,970'Semiconductor structure having interfacial layer and high-k dielectric layer'2016 9,236,253'Strained structure of a semiconductor device'2016 9,224,734'CMOS devices with reduced leakage and methods of forming the same'2015 9,214,556'Self-aligned dual-metal silicide and germanide formation'2015 9,209,066'Isolation structure of semiconductor device'2015 9,209,023'Growing III-V compound semiconductors from trenches filled with intermediate layers'2015 9,209,201'Systems and methods for integrating different channel materials into a CMOS circuit by using a semiconductor structure having multiple transistor layers'2015 9,202,691'Semiconductor device having modified profile metal gate'2015 9,194,804'Stress analysis of 3-D structures using tip-enhanced Raman scattering technology'2015 9,196,709'Methods for forming semiconductor regions in trenches'2015 9,184,050'Inverted trapezoidal recess for epitaxial growth'2015 9,177,792'Reverse tone STI formation and epitaxial growth of semiconductor between STI regions'2015 9,171,929'Strained structure of semiconductor device and method of making the strained structure'2015 9,159,824'FinFETs with strained well regions'2015 9,153,695'Fin-last finFET and methods of forming same'2015 9,142,474'Passivation structure of fin field effect transistor'2015 9,136,383'Contact structure of semiconductor device'2015 9,123,546'Multi-layer semiconductor device structures with different channel materials'2015 9,123,633'Methods for forming semiconductor regions in trenches'2015 9,105,490'Contact structure of semiconductor device'2015 9,105,654'Source/drain profile for FinFET'2015 9,099,494'Contact structure of semiconductor device'2015 9,093,530'Fin structure of FinFET'2015 9,093,335'Calculating carrier concentrations in semiconductor Fins using probed resistance'2015 9,087,902'FinFETs with strained well regions'2015 9,076,819'Contact structure of semiconductor device'2015 9,069,925'Method for constant power density scaling'2015 9,064,797'Systems and methods for dopant activation using pre-amorphization implantation and microwave radiation'2015 9,054,188'Curved wafer processing on method and apparatus'2015 9,048,317'Contact structure of semiconductor device'2015 9,040,393'Method of forming semiconductor structure'2015 9,041,158'Method of forming fin field-effect transistors having controlled fin height'2015 9,034,716'Method of making a FinFET device'2015 9,012,315'Methods and systems for dopant activation using microwave radiation'2015 9,006,788'Source/drain re-growth for manufacturing III-V based transistors'2015 9,006,056'Method for reducing interfacial layer thickness for high-k and metal gate stack'2015 9,006,802'Semiconductor device manufacturing methods and methods of forming insulating material layers'2015 8,987,095'Method of fabricating a carbon-free dielectric layer over a carbon-doped dielectric layer'2015 8,987,791'FinFETs and methods for forming the same'2015 8,969,201'Contact structure of semiconductor device priority claim'2015 8,969,156'Semiconductor structures and methods with high mobility and high energy bandgap materials'2015 8,963,257'Fin field effect transistors and methods for fabricating the same'2015 8,962,400'In-situ doping of arsenic for source and drain epitaxy'2015 8,946,035'Replacement channels for semiconductor devices and methods for forming the same using dopant concentration boost'2015 8,946,829'Selective fin-shaping process using plasma doping and etching for 3-dimensional transistor applications'2015 8,940,597'In-situ metal gate recess process for self-aligned contact application'2015 8,927,352'Channel epitaxial regrowth flow (CRF)'2015 8,927,371'High-mobility multiple-gate transistor with improved on-to-off current ratio'2015 8,921,136'Self aligned contact formation'2014 8,896,055'Accumulation type FinFET, circuits and fabrication method thereof'2014 8,878,302'Semiconductor device having SiGe substrate, interfacial layer and high K dielectric layer'2014 8,875,076'System and methods for converting planar design to FinFET design'2014 8,866,188'Semiconductor devices and methods of manufacture thereof'2014 8,853,052'Method of manufacturing a semiconductor device'2014 8,841,701'FinFET device having a channel defined in a diamond-like shape semiconductor structure'2014 8,836,016'Semiconductor structures and methods with high mobility and high energy bandgap materials'2014 8,823,065'Contact structure of semiconductor device'2014 8,815,712'Method for epitaxial re-growth of semiconductor region'2014 8,816,444'System and methods for converting planar design to FinFET design'2014 8,816,391'Source/drain engineering of devices with high-mobility channels'2014 8,809,139'Fin-last FinFET and methods of forming same'2014 8,809,202'Methods of manufacturing semiconductor devices including use of a protective material'2014 8,799,833'System and methods for converting planar design to FinFET design'2014 8,786,019'CMOS FinFET device'2014 8,785,285'Semiconductor devices and methods of manufacture thereof'2014 8,766,379'Multi-layer scavenging metal gate stack for ultra-thin interfacial dielectric layer'2014 8,759,203'Growing III-V compound semiconductors from trenches filled with intermediate layers'2014 8,759,920'Semiconductor device and method of forming the same'2014 8,728,906'Reverse tone STI formation'2014 8,726,220'System and methods for converting planar design to FinFET design'2014 8,716,765'Contact structure of semiconductor device'2014 8,674,341'High-mobility multiple-gate transistor with improved on-to-off current ratio'2014 8,674,408'Reducing source/drain resistance of III-V based transistors'2014 8,629,012'Method for forming antimony-based FETs monolithically'2014 8,629,040'Methods for epitaxially growing active regions between STI regions'2014 8,629,478'Fin structure for high mobility multiple-gate transistor'2014 8,623,718'Tilt implantation for forming FinFETs'2014 8,618,556'FinFET design and method of fabricating same'2013 8,621,406'System and methods for converting planar design to FinFET design'2013 8,617,976'Source/drain re-growth for manufacturing III-V based transistors'2013 8,609,517'MOCVD for growing III-V compound semiconductors on silicon substrates'2013 8,609,518'Re-growing source/drain regions from un-relaxed silicon layer'2013 8,603,924'Methods of forming gate dielectric material'2013 8,497,201'Self-assembly pattern for semiconductor integrated circuit'2013 8,486,770'Method of forming CMOS FinFET device'2013 8,470,659'Method for reducing interfacial layer thickness for high-k and metal gate stack'2013 8,455,860'Reducing source/drain resistance of III-V based transistors'2013 8,455,929'Formation of III-V based devices on semiconductor substrates'2013 8,426,890'Semiconductor device and manufacturing method with improved epitaxial quality of III-V compound on silicon surfaces'2013 8,375,349'Method for constant power density scaling'2013 8,334,570'Metal gate stress film for mobility enhancement in FinFET device'2012 8,268,683'Method for reducing interfacial layer thickness for high-K and metal gate stack'2012 8,264,021'Finfets and methods for forming the same'2012 8,264,032'Accumulation type FinFET, circuits and fabrication method thereof'2012 8,253,167'Method for forming antimony-based FETs monolithically'2012 8,242,540'Epitaxial growth of III-V compound semiconductors on silicon surfaces'2012 8,241,823'Method of fabrication of a semiconductor device having reduced pitch'2012 8,183,134'Semiconductor device and manufacturing method with improved epitaxial quality of III-V compound on silicon surfaces'2012 8,048,795'Self-assembly pattern for semiconductor integrated circuit'2011 8,039,179'Integrated circuit layout design'2011 7,915,112'Metal gate stress film for mobility enhancement in FinFET device'2011 7,862,962'Integrated circuit layout design'2011

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2011–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (119)· patent assignee history

2011–2021Based in Carmel, NY, US· patent location history

2012–2017Patents assigned to WANN CLEMENT HSINGJEN (60)· patent assignee history

2012–2017Patents assigned to KO CHIH-HSIN (31)· patent assignee history

2012–2017Patents assigned to WU CHENG-HSIEN (17)· patent assignee history

2015–2021Based in New York, NY, US· patent location history

2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (121)· patent assignee history

2016–2018Based in Hsinchu, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG CO LTD	121	2016–2021
TAIWAN SEMICONDUCTOR MFG	119	2011–2016
WANN CLEMENT HSINGJENself	60	2012–2017
KO CHIH-HSIN	31	2012–2017
WU CHENG-HSIEN	17	2012–2017

Locations

Location	Patents	Span
Carmel, New York, US	222	2011–2021
New York, New York, US	15	2015–2021
Hsinchu, TW	3	2016–2018