Inventor
Alex J. Schrinsky
Inventor
Boise, ID, US
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices26%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1022%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%
H01LSemiconductor devices19%
H10DInorganic electric semiconductor devices7%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
PatentTitleYear
11,088,147Apparatus with doped surfaces, and related methods with in situ doping202110,700,073Integrated assemblies having dielectric regions along conductive structures, and methods of forming integrated assemblies202010,347,643Methods of forming integrated assemblies having dielectric regions along conductive structures201910,134,741Methods of forming an elevationally extending conductor laterally between a pair of conductive lines20189,911,653'Low capacitance interconnect structures and associated systems and methods'20189,754,946'Methods of forming an elevationally extending conductor laterally between a pair of conductive lines'20179,679,964'Semiconductor constructions having peripheral regions with spaced apart mesas'20179,613,864'Low capacitance interconnect structures and associated systems and methods'20179,330,934'Methods of forming patterns on substrates'20169,136,331'Semiconductor constructions'20159,087,737'Methods of forming charge storage structures including etching diffused regions to form recesses'20159,082,721'Structures comprising masks comprising carbon'20159,082,714'Use of etch process post wordline definition to improve data retention in a flash memory device'20158,802,525'Methods of forming charge storage structures including etching diffused regions to form recesses'20148,696,922'Methods of plasma etching platinum-comprising materials, methods of processing semiconductor substrates in the fabrication of integrated circuitry, and methods of forming a plurality of memory cells'20148,409,457'Methods of forming a photoresist-comprising pattern on a substrate'20138,367,303'Semiconductor device fabrication and dry develop process suitable for critical dimension tunability and profile control'20138,309,424'Methods of forming electrically insulative materials, methods of forming low k dielectric regions, and methods of forming semiconductor constructions'20127,927,964'Methods of forming electrically insulative materials, methods of forming low k dielectric regions, and methods of forming semiconductor constructions'20117,898,019'Semiconductor constructions having multiple patterned masking layers over NAND gate stacks'20117,595,521'Terraced film stack'20097,491,641'Method of forming a conductive line and a method of forming a conductive contact adjacent to and insulated from a conductive line'20097,476,588'Methods of forming NAND cell units with string gates of various widths'20097,473,613'Terraced film stack'20097,468,533'Terraced film stack'20087,262,053'Terraced film stack'20077,118,966'Methods of forming conductive lines'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2021Patents assigned to MICRON TECHNOLOGY INC (26)· patent assignee history
2006–2021Based in Boise, ID, US· patent location history
2012–2016Patents assigned to SCHRINSKY ALEX J (3)· patent assignee history
2013–2014Patents assigned to SCHRINSKY ALEX (4)· patent assignee history
2013–2014Patents assigned to ZHU HONGBIN (2)· patent assignee history
2014Patents assigned to AELLA PAVAN (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 26 | 2006–2021 |
| SCHRINSKY ALEXself | 4 | 2013–2014 |
| SCHRINSKY ALEX Jself | 3 | 2012–2016 |
| ZHU HONGBIN | 2 | 2013–2014 |
| AELLA PAVAN | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Boise, ID, US | 27 | 2006–2021 |