Inventor
Yoo-Sang Hwang
Inventor
Suwon-si, KR
Overview
Patents· 78 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices29%
H10DInorganic electric semiconductor devices25%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1019%
H01LSemiconductor devices15%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
G11CStatic stores3%
H10NElectric solid-state devices not otherwise provided for1%
G06FElectric digital data processing0%
H01HElectric switches0%
H04LTransmission of digital information, e.g. telegraphic communication0%
PatentTitleYear
11,082,397Management system and method for remote controller of electronic device202111,043,498Semiconductor memory device202111,037,930Semiconductor devices202110,818,671Semiconductor devices202010,777,276Integrated circuit devices202010,665,498Semiconductor device having air gap spacer and method of fabricating the same202010,629,600Integrated circuit device including a support pattern, a lower electrode pattern, a dielectric structure, and an upper electrode structure202010,600,646Method of fabricating device including two-dimensional material202010,580,876Integrated circuit devices202010,573,652Semiconductor device and method for fabricating the same202010,515,798Method of fabricating device including two-dimensional material201910,510,759Semiconductor memory device201910,468,103Integrated circuit devices including separate memory cells on separate regions of individual substrate201910,332,831Semiconductor device including a bit line201910,128,252Semiconductor device20189,972,527Semiconductor device including air spacer20189,960,039Method of forming pattern and method of manufacturing integrated circuit device by using the same20189,953,981Methods of manufacturing semiconductor devices having buried contacts and related semiconductor devices20189,754,785'Methods of manufacturing semiconductor devices'20179,754,944'Method of manufacturing semiconductor device'20179,634,012'Method of forming active patterns, active pattern array, and method of manufacturing a semiconductor device'20179,601,420'Semiconductor device and method of manufacturing the same'20179,576,902'Semiconductor device including landing pad'20179,570,510'Magnetoresistive random access memory devices and methods of manufacturing the same'20179,559,103'Memory device including selectively disposed landing pads expanded over signal line'20179,548,260'Semiconductor devices including conductive plug'20179,461,051'Methods of forming electronic devices having pads using first and second masks'20169,437,560'Semiconductor device including landing pad'20169,419,000'Methods of manufacturing semiconductor devices having buried contacts and related semiconductor devices'20169,337,151'Semiconductor device'20169,276,074'Methods of fabricating semiconductor devices having buried channel array'20169,159,730'Methods for fabricating a semiconductor device'20159,117,696'Semiconductor devices having balancing capacitor and methods of forming the same'20159,012,321'Method of manufacturing semiconductor device'20158,884,340'Semiconductor devices including dual gate electrode structures and related methods'20148,785,998'Semiconductor device having vertical channel transistor and methods of fabricating the same'20148,766,354'Semiconductor devices including vertical channel transistors and methods of manufacturing the same'20148,742,493'Semiconductor devices having vertical channel transistors and methods for fabricating the same'20148,604,558'Semiconductor device having improved reliability'20138,552,472'Integrated circuit devices including vertical channel transistors with shield lines interposed between bit lines and methods of fabricating the same'20138,497,174'Method of fabricating semiconductor device including vertical channel transistor'20138,492,832'Semiconductor device'20138,420,485'Semiconductor device having vertical channel transistor and method of manufacturing the same'20138,394,697'Methods of forming capacitors for semiconductor memory devices'20138,362,536'Semiconductor device having vertical channel transistor and methods of fabricating the same'20137,888,724'Capacitors for semiconductor memory devices'20117,855,120'Methods for forming resistors including multiple layers for integrated circuit devices'20107,749,834'Method of fabricating semiconductor devices having buried contact plugs'20107,601,630'Semiconductor device and method for fabricating the same'20097,595,251'Method of fabricating semiconductor device having alignment key and semiconductor device fabricated thereby'20097,473,619'Method of fabricating semiconductor device having alignment key and semiconductor device fabricated thereby'20097,262,108'Methods for forming resistors for integrated circuit devices'20077,247,906'Semiconductor devices having DRAM cells and methods of fabricating the same'20077,176,552'Semiconductor memory device having a decoupling capacitor'20077,145,195'Semiconductor memory device and method of manufacturing the same'20067,078,292'Storage node contact forming method and structure for use in semiconductor memory'20067,026,208'Methods of forming integrated circuit devices including cylindrical capacitors having supporters between lower electrodes'20066,977,197'Semiconductor devices having DRAM cells and methods of fabricating the same'20056,929,999'Method of manufacturing semiconductor device with contact body extending in direction of bit line to contact storage node'20056,927,126'Method of manufacturing semiconductor device with interconnections and interconnection contacts and a device formed thereby'20056,815,300'Method for manufacturing semiconductor device having increased effective channel length'20046,764,941'Bit line landing pad and borderless contact on bit line stud with localized etch stop layer and manufacturing method thereof'20046,720,269'Semiconductor device having a self-aligned contact structure and methods of forming the same'20046,703,657'DRAM cell having electrode with protection layer'20046,670,663'DRAM cell capacitor and manufacturing method thereof'20036,656,790'Method for manufacturing a semiconductor device including storage nodes of capacitor'20036,638,805'Method of fabricating a DRAM semiconductor device'20036,613,621'Methods of forming self-aligned contact pads using a damascene gate process'20036,548,853'Cylindrical capacitors having a stepped sidewall and methods for fabricating the same'20036,534,813'Semiconductor device having a self-aligned contact structure and methods of forming the same'20036,518,671'Bit line landing pad and borderless contact on bit line stud with localized etch stop layer and manufacturing method thereof'20036,489,195'Method for fabricating DRAM cell using a protection layer'20026,479,343'DRAM cell capacitor and manufacturing method thereof'20026,288,446'Semiconductor device with pillar-shaped capacitor storage node'20016,277,702'Capacitor of a semiconductor device and a method of fabricating the same'20016,235,573'Methods of forming ferroelectric random access memory devices having shared capacitor electrodes'20016,229,171'Storage element for semiconductor capacitor'20016,218,296'Semiconductor device with pillar-shaped capacitor storage node and method of fabricating the same'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2021Patents assigned to SAMSUNG ELECTRONICS CO LTD (78)· patent assignee history
2001–2006Based in Kyungki-do, KR· patent location history
2001–2006Based in Yongin, KR· patent location history
2002–2020Based in Suwon-si, KR· patent location history
2004–2021Based in Seoul, KR· patent location history
2005–2013Based in Gyeonggi-do, KR· patent location history
2013–2017Patents assigned to HWANG YOO-SANG (17)· patent assignee history
2013–2017Patents assigned to CHUNG HYUN-WOO (8)· patent assignee history
2013–2017Patents assigned to KIM DAE-IK (8)· patent assignee history
2013–2016Patents assigned to HONG HYEONG-SUN (7)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 78 | 2001–2021 |
| HWANG YOO-SANGself | 17 | 2013–2017 |
| CHUNG HYUN-WOO | 8 | 2013–2017 |
| KIM DAE-IK | 8 | 2013–2017 |
| HONG HYEONG-SUN | 7 | 2013–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Suwon-si, KR | 48 | 2002–2020 |
| Kyungki-do, KR | 12 | 2001–2006 |
| Gyeonggi-do, KR | 9 | 2005–2013 |
| Yongin, KR | 5 | 2001–2006 |
| Seoul, KR | 2 | 2004–2021 |