Inventor
ZHENXING BI
Inventor
US
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices21%
H10DInorganic electric semiconductor devices21%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
B82YSpecific uses or applications of nanostructures9%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
G06NComputing arrangements based on specific computational models3%
A61BDiagnosis2%
A61HPhysical therapy apparatus, e.g. devices for locating or stimulating reflex points in the body2%
A61MDevices for introducing media into, or onto, the body2%
G06FElectric digital data processing2%
PatentTitleYear
12,520,567Hybrid-channel nano-sheet FETs202611,908,890Isolation structure for stacked vertical transistors202411,798,852Hybrid-channel nano-sheet FETs202311,744,981Internet of things (IoT) real-time response to defined symptoms202311,682,582Field effect transistor devices with self-aligned source/drain contacts and gate contacts positioned over active transistors202311,682,674Stacked nanosheet complementary metal oxide semiconductor field effect transistor devices202311,677,026Transistor having wrap-around source/drain contacts202311,495,688Source and drain epitaxy and isolation for gate structures202211,489,044Nanosheet transistor bottom isolation202211,453,911DNA sequencing with stacked nanopores202211,362,093Co-integration of non-volatile memory on gate-all-around field effect transistor202211,335,773Trench contact resistance reduction202211,302,797Approach to bottom dielectric isolation for vertical transport fin field effect transistors202211,302,205Language learning and speech enhancement through natural language processing202211,276,612Hybrid-channel nano-sheet FETS202211,251,267Vertical transistors with multiple gate lengths202211,210,968Behavior-based interactive educational sessions202111,195,755Field effect transistor devices with self-aligned source/drain contacts and gate contacts positioned over active transistors202111,195,754Transistor with reduced gate resistance and improved process margin of forming self-aligned contact202111,185,658Internet of things (IOT) real-time response to defined symptoms202111,164,959VFET devices with ILD protection202111,164,958Nanosheet transistor having a strained channel with strain-preserving multi-segmented source/drain regions202111,158,730Formation of inner spacer on nanosheet MOSFET202111,145,508Forming a fin cut in a hardmask2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2024Patents assigned to IBM (21)· patent assignee history
2021–2026Based in US· patent location history
2022Patents assigned to TESSERA INC (1)· patent assignee history
2023Patents assigned to TESSERA LLC (1)· patent assignee history
2026Patents assigned to ADEIA SEMICONDUCTOR SOLUTIONS LLC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 21 | 2021–2024 |
| ADEIA SEMICONDUCTOR SOLUTIONS LLC | 1 | 2026 |
| TESSERA INC | 1 | 2022 |
| TESSERA LLC | 1 | 2023 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 24 | 2021–2026 |