Inventor

Xin Guo

Inventor
Mountain View, CA, US

Overview

21→
Patents
2002–2016
Patent span
Electricity
Primary field (CPC H)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores33%
H10DInorganic electric semiconductor devices22%
H04NPictorial communication, e.g. television19%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
C23CCoating metallic material4%
G01RMeasuring electric variables4%
G09GArrangements or circuits for control of indicating devices using static means to present variable information4%
G11BInformation storage based on relative movement between record carrier and transducer4%
H10BElectronic memory devices4%
PatentTitleYear
9,503,744'Video processor with random access to compressed frame buffer and methods for use therewith'20169,407,920'Video processor with reduced memory bandwidth and methods for use therewith'20169,277,218'Video processor with lossy and lossless frame buffer compression and methods for use therewith'20169,088,800'General video decoding device for decoding multilayer video and methods for use therewith'20159,025,660'Video decoder with general video decoding device and methods for use therewith'20158,179,627'Floating guard band for shingle magnetic recording'20127,020,022'Method of reference cell design for optimized memory circuit yield'20066,991,987'Method for producing a low defect homogeneous oxynitride'20066,950,344'Reading flash memory'20056,888,763'Compensated oscillator circuit for charge pumps'20056,878,589'Method and system for improving short channel effect on a floating gate device'20056,864,106'Method and system for detecting tunnel oxide encroachment on a memory device'20056,828,623'Floating gate memory device with homogeneous oxynitride tunneling dielectric'20046,825,083'Method for reducing shallow trench isolation edge thinning on thin gate oxides to improve peripheral transistor reliability and performance for high performance flash memory devices'20046,822,259'Method of detecting and distinguishing stack gate edge defects at the source or drain junction'20046,778,437'Memory circuit for providing word line redundancy in a memory sector'20046,646,462'Extraction of drain junction overlap with the gate and the channel length for ultra-small CMOS devices with ultra-thin gate oxides'20036,617,639'Use of high-K dielectric material for ONO and tunnel oxide to improve floating gate flash memory coupling'20036,606,273'Methods and systems for flash memory tunnel oxide reliability testing'20036,570,787'Programming with floating source for low power, low leakage and high density flash memory devices'20036,438,037'Threshold voltage compacting for non-volatile semiconductor memory designs'2002

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2002–2006Patents assigned to ADVANCED MICRO DEVICES INC (15)· patent assignee history
2002–2006Based in Mountain View, CA, US· patent location history
2012Based in Santa Clara, CA, US· patent location history
2015–2016Patents assigned to VIXS SYSTEMS INC (5)· patent assignee history
2015Patents assigned to GUO XIN CINDY (2)· patent assignee history
2015Patents assigned to WANG LIMIN BOB (2)· patent assignee history
2015Patents assigned to WANG ZHONG YAN JASON (2)· patent assignee history
2015–2016Based in Toronto, CA· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
ADVANCED MICRO DEVICES INC152002–2006
VIXS SYSTEMS INC52015–2016
GUO XIN CINDYself22015
WANG LIMIN BOB22015
WANG ZHONG YAN JASON22015
Locations
LocationPatentsSpan
Mountain View, California, US152002–2006
Toronto, CA52015–2016
Santa Clara, California, US12012