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Inventor

Koji Nii

Inventor
Tokyo, JP

Overview

123→
Patents
1991–2020
Patent span
Physics
Primary field (CPC G)

Patents· 123 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores47%
H10BElectronic memory devices21%
H10DInorganic electric semiconductor devices14%
H01LSemiconductor devices4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h102%
G06FElectric digital data processing1%
G06KGraphical data reading1%
H03KPulse technique1%
PatentTitleYear
10,770,160Programmable resistive memory formed by bit slices from a standard cell library202010,734,063Semiconductor device202010,706,917Semiconductor memory device202010,644,009Semiconductor memory device202010,580,490Semiconductor device2020RE047831Semiconductor memory202010,510,761Static random access memory device with halo regions having different impurity concentrations2019RE047679Semiconductor memory201910,381,056Dual port static random access memory (DPSRAM) cell201910,262,707Semiconductor memory device for stably reading and writing data201910,262,720Semiconductor device201910,242,733Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage201910,229,721Semiconductor memory device for stably reading and writing data201910,217,751Static random access memory device with halo regions having different impurity concentrations2019RE047251Semiconductor memory201910,032,781Static random access memory device with halo regions having different impurity concentrations20189,984,767Semiconductor device having capability of generating chip identification information20189,984,744Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage20189,972,629Semiconductor integrated circuit device20189,767,893'Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage'20179,711,512'Semiconductor integrated circuit device'20179,672,900'Semiconductor memory device for stably reading and writing data'2017RE046272'Semiconductor memory'20179,515,076'Semiconductor integrated circuit device'20169,502,112'Semiconductor memory device'20169,496,028'Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage'20169,449,715'Semiconductor device having capability of generating chip identification information'20169,299,418'Semiconductor memory device for stably reading and writing data'20169,256,261'Semiconductor device having identification information generating function and identification information generation method for semiconductor device'20169,218,873'Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage'20159,214,222'Semiconductor device having timing control for read-write memory access operations'20159,123,435'Semiconductor integrated circuit device'20158,879,334'Semiconductor device having timing control for read-write memory access operations'20148,743,645'Semiconductor memory device for stably reading and writing data'20148,659,969'Semiconductor device'20148,630,142'Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage'2014RE044242'Semiconductor memory'20138,441,843'Semiconductor integrated circuit device'20138,363,456'Semiconductor device'20138,310,883'Semiconductor memory device comprising a plurality of static memory cells'20128,305,836'Semiconductor memory device highly integrated in direction of columns'20128,238,142'Semiconductor memory device'20128,238,192'Semiconductor memory device having multiple ports'20128,218,390'Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage'20128,098,533'Semiconductor memory device with adjustable selected word line potential under low voltage condition'20128,072,799'Semiconductor integrated circuit device'20118,018,785'Semiconductor memory device comprising a plurality of static memory cells'20118,009,500'Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage'20117,969,811'Semiconductor memory device highly integrated in direction of columns'20117,969,766'Semiconductor memory device'20117,876,625'Semiconductor memory device comprising a plurality of static memory cells'2011RE041638'Semiconductor memory'20107,738,285'Semiconductor memory device'20107,675,122'Semiconductor memory device'20107,602,654'Semiconductor memory device comprising a plurality of static memory cells'20097,599,214'Semiconductor memory device'20097,570,525'Semiconductor memory device with adjustable selected work line potential under low voltage condition'20097,570,540'Multiport semiconductor memory device'20097,502,275'Semiconductor memory device'20097,489,539'Semiconductor memory device'20097,477,537'Semiconductor integrated circuit device'20097,471,545'Semiconductor memory device'20087,423,916'Semiconductor memory device capable of controlling potential level of power supply line and/or ground line'20087,420,834'Semiconductor integrated circuit device'20087,411,860'Multiport semiconductor memory device'20087,382,026'Semiconductor memory device and method of manufacturing the same'20087,376,002'Semiconductor memory device'20087,355,873'Highly integrated ternary semiconductor memory device'20087,345,910'Semiconductor device'20087,286,391'Semiconductor memory device capable of controlling potential level of power supply line and/or ground line'20077,271,454'Semiconductor memory device and method of manufacturing the same'20077,260,018'Multiport semiconductor memory device'20077,237,175'Memory circuit'20077,170,812'Semiconductor memory device capable of reducing power consumption during reading and standby'20077,113,421'Semiconductor integrated circuit device'20067,110,318'Semiconductor memory device'20067,079,413'Semiconductor memory device with back gate potential control circuit for transistor in memory cell'20067,035,135'Semiconductor memory device'20067,023,247'Semiconductor device having CMOS driver circuit'20067,024,524'Semiconductor storage'20067,002,826'Semiconductor memory device'20066,999,371'Semiconductor memory device capable of reducing power consumption during reading and standby'20066,985,379'Semiconductor memory device'20066,917,560'Reduction of capacitive effects in a semiconductor memory device'20056,909,135'Semiconductor memory device'20056,903,962'Semiconductor memory device capable of controlling potential level of power supply line and/or ground line'20056,868,001'Semiconductor memory device'20056,822,300'Semiconductor memory device'20046,818,932'Semiconductor device with improved soft error resistance'20046,815,839'Soft error resistant semiconductor memory device'20046,807,081'Semiconductor memory circuit hard to cause soft error'20046,807,124'Memory device for activating one cell by specifying block and memory cell in the block'20046,804,153'Semiconductor memory device internally generating internal data read timing'20046,791,200'Semiconductor memory device'20046,760,269'Semiconductor memory device capable of generating internal data read timing precisely'20046,741,492'Semiconductor memory device'20046,717,223'Semiconductor device with integrally formed well contact areas'20046,717,842'Static type semiconductor memory device with dummy memory cell'20046,710,412'Static semiconductor memory device'20046,693,820'Soft error resistant semiconductor memory device'20046,690,608'Semiconductor memory device with internal data reading timing set precisely'20046,670,262'Method of manufacturing semiconductor device'20036,643,167'Semiconductor memory'20036,627,960'Semiconductor data storage apparatus'20036,590,802'Semiconductor storage apparatus'20036,535,453'Semiconductor memory device'20036,535,417'Semiconductor storage device'20036,529,401'Semiconductor memory'20036,504,788'Semiconductor memory with improved soft error resistance'20036,493,256'Semiconductor memory device'20026,347,062'Semiconductor memory device'20026,046,949'Semiconductor integrated circuit'20006,043,521'Layout pattern of memory cell circuit'20005,793,681'Multiport memory cell circuit having read buffer for reducing read access time'19985,777,929'Multiport memory cell circuit having read buffer for reducing read access time'19985,748,541'Latch circuit operating in synchronization with clock signals'19985,684,743'Multiport memory cell circuit having read buffer for reducing read access time'1997RE035591'Memory cell array semiconductor integrated circuit device'19975,654,914'Memory cell array semiconductor integrated circuit device'19975,535,159'Multiport memory cell circuit having read buffer for reducing read access time'19965,471,420'Memory cell array semiconductor integrated circuit device'19955,420,813'Multiport memory cell circuit having read buffer for reducing read access time'19955,055,340'Grip tape'1991

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1995–2004Patents assigned to MITSUBISHI ELECTRIC CORP (20)· patent assignee history
1995–1998Based in Itami, JP· patent location history
1996–2012Based in Hyogo, JP· patent location history
1998–2020Based in Tokyo, JP· patent location history
2003–2010Patents assigned to RENESAS TECH CORP (49)· patent assignee history
2006–2015Based in Kawanishi, JP· patent location history
2011–2020Patents assigned to RENESAS ELECTRONICS CORP (46)· patent assignee history
2011–2018Patents assigned to NII KOJI (14)· patent assignee history
2012–2018Patents assigned to YABUUCHI MAKOTO (5)· patent assignee history
2013–2018Based in Kanagawa, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
RENESAS TECH CORP492003–2010
RENESAS ELECTRONICS CORP462011–2020
MITSUBISHI ELECTRIC CORP201995–2004
NII KOJIself142011–2018
YABUUCHI MAKOTO52012–2018
Locations
LocationPatentsSpan
Tokyo, JP741998–2020
Hyogo, JP271996–2012
Itami, JP71995–1998
Kawanishi, JP62006–2015
Kanagawa, JP52013–2018