Inventor
Prateep Tuntasood
Inventor
San Jose, CA, US
Overview
Patents· 25 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices27%
H10DInorganic electric semiconductor devices25%
G11CStatic stores22%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
H01LSemiconductor devices3%
PatentTitleYear
9,673,208'Method of forming memory array and logic devices'20179,293,359'Non-volatile memory cells with enhanced channel region effective width, and method of making same'20168,461,640'FIN-FET non-volatile memory cell, and an array and method of manufacturing'20137,974,136'Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio'20117,800,159'Array of contactless non-volatile memory cells'20107,718,488'Process of fabricating flash memory with enhanced program and erase coupling'20107,668,013'Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio'20107,646,641'NAND flash memory with nitride charge storage gates and fabrication process'20107,598,561'NOR flash memory'20097,501,321'NAND flash memory with densely packed memory gates and fabrication process'20097,217,621'Self-aligned split-gate NAND flash memory and fabrication process'20077,215,573'Method and apparatus for reducing operation disturbance'20077,046,552'Flash memory with enhanced program and erase coupling and process of fabricating the same'20067,037,787'Flash memory with trench select gate and fabrication process'20066,992,929'Self-aligned split-gate NAND flash memory and fabrication process'20066,894,339'Flash memory with trench select gate and fabrication process'20056,885,586'Self-aligned split-gate NAND flash memory and fabrication process'20056,747,310'Flash memory cells with separated self-aligned select and erase gates, and process of fabrication'20046,171,907'Method for fabricating tunnel window in EEPROM cell with reduced cell pitch'20015,407,840'Method for simultaneously fabricating bipolar and complementary field effect transistors'19955,179,031'Method of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide'19935,124,817'Polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide'19925,023,193'Method for simultaneously fabricating bipolar and complementary field effect transistors using a minimal number of masks'19915,001,081'Method of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide'19914,727,046'Method of fabricating high performance BiCMOS structures having poly emitters and silicided bases'1988Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1988Patents assigned to FAIRCHILD SEMICONDUCTOR (1)· patent assignee history
1988–2017Based in San Jose, CA, US· patent location history
1991–1995Patents assigned to NAT SEMICONDUCTOR CORP (5)· patent assignee history
2004–2005Patents assigned to ACTRANS SYSTEM INC (2)· patent assignee history
2004–2010Based in Santa Clara, CA, US· patent location history
2005–2006Patents assigned to ACTRANS SYSTEM INC USA (4)· patent assignee history
2007–2017Patents assigned to SILICON STORAGE TECH INC (11)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SILICON STORAGE TECH INC | 11 | 2007–2017 |
| NAT SEMICONDUCTOR CORP | 5 | 1991–1995 |
| ACTRANS SYSTEM INC USA | 4 | 2005–2006 |
| ACTRANS SYSTEM INC | 2 | 2004–2005 |
| FAIRCHILD SEMICONDUCTOR | 1 | 1988 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 15 | 1988–2017 |
| Santa Clara, California, US | 10 | 2004–2010 |