Inventor
Merit Y. Hong
Inventor
Chandler, AZ, US
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Mprimary
H03MCoding33%
G06FElectric digital data processing13%
G01KMeasuring temperature10%
G11CStatic stores10%
G01RMeasuring electric variables7%
H03FAmplifiers7%
H10DInorganic electric semiconductor devices7%
G06GAnalogue computers3%
H03HImpedance networks, e.g. resonant circuits3%
H03KPulse technique3%
PatentTitleYear
9,488,529'Temperature measurement system'20169,470,585'Calibrated temperature measurement system'20169,322,719'Input stage for temperature measurement system'20168,638,251'Delay compensation for sigma delta modulator'20148,427,237'Common-mode feedback circuit'20137,898,353'Clock conditioning circuit'20117,880,653'Switched-capacitor circuits, integration systems, and methods of operation thereof'20117,852,253'Digitally adjustable quantization circuit'20107,834,787'Techniques for delay compensation of continuous-time sigma-delta modulators'20107,443,325'Sigma-delta modulator'20087,323,931'System and method for operating a feedback network'20087,315,268'Integrator current matching'20087,068,198'Double-sampled integrator system and method thereof'20066,927,722'Series capacitive component for switched-capacitor circuits consisting of series-connected capacitors'20056,839,011'System and method of filtering in an integration system'20056,621,438'Digital-to-analog conversion with current path exchange during clock phases'20036,147,551'Switched capacitor circuit and method for reducing sampling noise'20005,901,066'Automated method for adding attributes identified on a schematic diagram to an integrated circuit layout'19995,886,921'Static random access memory cell having graded channel metal oxide semiconductor transistors and method of operation'19995,748,475'Apparatus and method of orienting asymmetrical semiconductor devices in a circuit'19985,712,794'Automated method for adding attributes indentified on a schematic diagram to an integrated circuit layout'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2003Patents assigned to MOTOROLA INC (6)· patent assignee history
1998–2016Based in Chandler, AZ, US· patent location history
2005–2011Patents assigned to FREESCALE SEMICONDUCTOR INC (10)· patent assignee history
2013–2014Patents assigned to HONG MERIT (2)· patent assignee history
2013Patents assigned to FUJITSU SEMICONDUCTOR LTD (1)· patent assignee history
2016Patents assigned to INTEL IP CORP (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FREESCALE SEMICONDUCTOR INC | 10 | 2005–2011 |
| MOTOROLA INC | 6 | 1998–2003 |
| INTEL IP CORP | 3 | 2016 |
| HONG MERITself | 2 | 2013–2014 |
| FUJITSU SEMICONDUCTOR LTD | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chandler, AZ, US | 21 | 1998–2016 |