Inventor

MENG-SHENG CHANG

Inventor

TW

Overview

2021–2026

Patent span

Electricity

Primary field (CPC H)

Patents· 139 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores21%

H10BElectronic memory devices19%

H01LSemiconductor devices17%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%

H10DInorganic electric semiconductor devices13%

G06FElectric digital data processing6%

B82YSpecific uses or applications of nanostructures2%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%

H03KPulse technique1%

G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%

PatentTitleYear

12,597,466Semiconductor memory devices with differential threshold voltages2026 12,592,293Semiconductor device and method for manufacturing the same2026 12,588,512Generation of physically unclonable function using one-time-programmable memory devices with backside interconnect structures2026 12,588,295Capacitor and method for forming the same2026 12,563,722Integrated circuit and method of forming the same2026 12,563,721Memory device and method for forming the same2026 12,563,723Efuse cells with backside power rails2026 12,564,061Generation of physically unclonable function using one-time-programmable memory devices with back-end-of-line transistors2026 12,548,620Memory device and operating method thereof2026 12,531,118Memory device with physical unclonable function and operating method thereof2026 12,531,117Semiconductor device and programmable macro circuit2026 12,489,051One-time-programmable memory device including an antifuse structure and methods of forming the same2025 12,464,811Memory devices and methods of manufacturing thereof2025 12,463,151PUF memory devices and methods of manufacturing thereof2025 12,423,494Memory device with improved anti-fuse read current2025 12,412,620Second word line combined with y-mux signal in high voltage memory program2025 12,406,702Switches to reduce routing rails of memory system2025 12,406,741Semiconductor memory devices with backside heater structure2025 12,406,923One-time-programmable memory device including an antifuse structure and methods of forming the same2025 12,396,168One-time programmable memory device2025 12,394,457Memory cell and method of forming the memory cell2025 12,380,959Memory device and methods2025 12,382,714Memory devices and methods of manufacturing thereof2025 12,374,396Memory including metal rails with balanced loading2025 12,361,192Memory device, integrated circuit device and method2025 12,356,683Semiconductor memory devices with dielectric fin structures2025 12,354,950MIM efuse memory devices and memory array using a metal-based layer between structures2025 12,347,771Semiconductor device having fuse array and method of making the same2025 12,349,423Memory devices and methods of manufacturing thereof2025 12,341,093Method for protecting anti-fuse cell2025 12,324,149Metal fuse structure by via landing2025 12,315,561Semiconductor memory devices with different word lines2025 12,300,603Modified fuse structure and method of use2025 12,293,799Memory circuit and method of operating same2025 12,284,804Memory devices, semiconductor devices, and methods of operations a memory device2025 12,283,951Voltage provision circuits with core transistors2025 12,277,990Memory device and method of operating the same2025 12,256,539One-time-programmable memory devices having first transistor, second transistor, and resistor in series2025 12,243,816Semiconductor structure havbing an enhanced E-fuse and a method making the same2025 12,243,618Method of manufacturing semiconductor device2025 12,237,264Fusible structures2025 12,230,359Semiconductor device2025 12,230,681Semiconductor memory devices with different doping types2025 12,224,238MIM eFuse memory devices and memory array2025 12,218,047Memory devices and methods of manufacturing thereof2025 12,217,798Bank design with differential bulk bias in eFuse array2025 12,219,755Anti-fuse device and method2025 12,211,568Multi-fuse memory cell circuit and method2025 12,205,648Three-dimensional one time programmable memory2025 12,205,891Methods of manufacturing fusible structures2025 12,198,785Semiconductor memory devices with dielectric fin structures2025 12,193,223Memory device with improved anti-fuse read current2025 12,193,204Memory devices and methods of manufacturing thereof2025 12,190,927Memory device with a bias circuit2025 12,176,049MIM eFuse memory devices and fabrication method thereof2024 12,165,865Efuse with fuse walls and method of manufacturing the same2024 12,148,487High-density and high-voltage-tolerable pure core memory cell2024 12,112,829Memory array circuits, memory structures, and methods for fabricating a memory array circuit2024 12,094,558Multiple stack high voltage circuit for memory2024 12,087,378Bit selection for power reduction in stacking structure during memory programming2024 12,089,402Integrated circuit layout and method2024 12,080,641Electrical fuse bit cell in integrated circuit having backside conducting lines2024 12,073,169Anti-fuse array2024 12,075,614MIM memory cell with backside interconnect structures2024 12,062,408Switches to reduce routing rails of memory system2024 12,063,773Layout structure including anti-fuse cell2024 12,052,859Non-volatile memory device with reduced area2024 12,051,464Semiconductor memory devices with different word lines2024 12,048,147Layout structure including anti-fuse cell2024 12,027,221Integrated circuit device2024 12,027,204Memory including metal rails with balanced loading2024 12,014,796Memory device and method of operating the same2024 12,010,833Method and structure for reduce OTP cell area and leakage2024 12,002,802Capacitor and method for forming the same2024 11,990,183Memory system with physical unclonable function2024 11,985,819Layout method by buried rail for centralized anti-fuse read current2024 11,978,509Semiconductor memory devices with differential threshold voltages2024 11,963,348Integrated circuit read only memory (ROM) structure2024 11,956,947One-time programmable memory device2024 11,955,201Memory device2024 11,950,411Semiconductor memory devices with dielectric fin structures2024 11,942,168EFuse structure and method2024 11,942,155Semiconductor memory devices with dielectric fin structures2024 11,903,188Memory devices, semiconductor devices, and methods of operating a memory device2024 11,856,762Memory devices and methods of manufacturing thereof2023 11,856,761Semiconductor memory devices with different doping types2023 11,854,968Modified fuse structure and method of use2023 11,854,616Memory including metal rails with balanced loading2023 11,849,574Layout structure of storage cell and manufacturing method thereof2023 11,844,209Memory cell and method of forming the memory cell2023 11,842,781Layout structures of memory array and related methods2023 11,837,300Multi-fuse memory cell circuit and method2023 11,837,539Electrical fuse bit cell in integrated circuit having backside conducting lines2023 11,830,827Semiconductor memory devices with dielectric fin structures2023 11,823,769Reducing capacitive loading of memory system based on switches2023 11,817,160One-time programmable memory bit cell2023 11,803,683Method of and system for manufacturing semiconductor device2023 11,791,005Memory circuit and method of operating same2023 11,783,107Integrated circuit structure2023 11,785,766E-fuse2023 11,763,875Second word line combined with Y-MUX signal in high voltage memory program2023 11,756,640MIM efuse memory devices and fabrication method thereof2023 11,758,715System and method for reducing cell area and current leakage in anti-fuse cell array2023 11,756,622Bank design with differential bulk bias in eFuse array2023 11,756,591Switches to reduce routing rails of memory system2023 11,723,194Integrated circuit read only memory (ROM) structure2023 11,703,650Optical fiber protection system2023 11,696,437Integrated circuit device2023 11,682,433Multiple stack high voltage circuit for memory2023 11,664,081Bit selection for power reduction in stacking structure during memory programming2023 11,658,114Fusible structures and methods of manufacturing same2023 11,653,492Memory devices and methods of manufacturing thereof2023 11,626,368Semiconductor device having fuse array and method of making the same2023 11,621,046EFuse circuit, method, layout, and structure2023 11,605,639One-time-programmable memory device including an antifuse structure and methods of forming the same2023 11,600,626Semiconductor device including anti-fuse cell2023 11,569,249Anti-fuse device method and layout2023 11,569,248Integrated circuit including eFuse cell2023 11,562,998Capacitor and method for forming the same2023 11,563,014Memory devices and methods of manufacturing thereof2023 11,563,015Memory devices and methods of manufacturing thereof2023 11,532,752Non-volatile memory device with reduced area2022 11,527,541System and method for reducing resistance in anti-fuse cell2022 11,501,051Memory device, integrated circuit device and method2022 11,443,819Memory device, integrated circuit device and method2022 11,437,386System and method for reducing cell area and current leakage in anti-fuse cell array2022 11,422,445Projector with temperature sensor and projector protection method2022 11,423,960Memory device2022 11,410,926E-fuse enhancement by underlayer layout design2022 11,410,740Multi-fuse memory cell circuit and method2022 11,380,693Semiconductor device including anti-fuse cell structure2022 11,342,341Integrated circuit layout, method, structure, and system2022 11,335,424One-time programmable memory bit cell2022 11,315,936Memory device and manufacturing method thereof2022 11,257,827Layout structure including anti-fuse cell2022 11,257,757Semiconductor device having fuse array and method of making the same2022 11,250,923Layout structures of memory array2022 11,211,134Efuse circuit, method, layout, and structure2021 11,176,969Memory circuit including a first program device2021

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2021–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (136)· patent assignee history

2021–2026Based in TW· patent location history

2022–2023Patents assigned to DELTA ELECTRONICS INC (2)· patent assignee history

2022Patents assigned to TAIWAN SEMICONDUCTOH MANUFACTUHING COMPANY LTD (1)· patent assignee history

2023Patents assigned to TAIWAN SEMICONDUCTOR MFG LIMITED (1)· patent assignee history

2026Patents assigned to TAIWAN SEMICONDUCTOR MFG COMPANY LTD (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG CO LTD	136	2021–2026
DELTA ELECTRONICS INC	2	2022–2023
TAIWAN SEMICONDUCTOH MANUFACTUHING COMPANY LTD	1	2022
TAIWAN SEMICONDUCTOR MFG COMPANY LTD	1	2026
TAIWAN SEMICONDUCTOR MFG LIMITED	1	2023

Locations

Location	Patents	Span
TW	139	2021–2026