Inventor

Yoshitsugu Inoue

Inventor
Hyogo, JP

Overview

26→
Patents
1991–2006
Patent span
Physics
Primary field (CPC G)

Patents· 26 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing52%
G06TImage data processing or generation, in general29%
G11CStatic stores6%
G09GArrangements or circuits for control of indicating devices using static means to present variable information3%
H03KPulse technique3%
H04LTransmission of digital information, e.g. telegraphic communication3%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use3%
PatentTitleYear
7,054,979'Method and apparatus for routing configuration accesses from a primary port to a plurality of secondary ports'20067,038,684'Rendering process apparatus capable of improving processing speed of overall graphic system'20066,950,106'3-dimensional graphic plotting apparatus'20056,820,107'Square root extraction circuit and floating-point square root extraction device'20046,795,075'Graphic processor having multiple geometric operation units and method of processing data thereby'20046,711,601'Logarithmic arithmetic unit avoiding division as far as predetermined arithmetic precision is guaranteed'20046,697,889'First-in first-out data transfer control device having a plurality of banks'20046,675,251'Bridge device for connecting multiple devices to one slot'20046,603,481'Geometry processor capable of executing input/output and high speed geometry calculation processing in parallel'20036,581,087'Floating point adder capable of rapid clip-code generation'20036,480,873'Power operation device'20026,442,627'Output FIFO data transfer control device'20026,321,313'Memory system, memory control system and image processing system'20016,148,318'Square root extraction circuit and floating-point square root extraction device'20006,005,590'Geometrical operation apparatus for performing high speed calculations in a three-dimensional computer graphic display system'19995,982,380'Hardware clipping device which compares objects with boundaries via use of absolute values'19995,974,436'Execution processor for carrying out power calculation'19995,923,829'Memory system, memory control system and image processing system'19995,729,758'SIMD processor operating with a plurality of parallel processing elements in synchronization'19985,715,436'Image processing LSI circuit with image preprocessing, feature extraction and matching'19985,673,422'Semiconductor integrated circuit for processing image data'19975,657,485'Program control operation to execute a loop processing not immediately following a loop instruction'19975,602,940'Method of labeling image data and device for the same using temporary labels having a concentration relationship'19975,249,146'DCT/IDCT processor and data processing method'19935,233,233'Multiplexer for use in a full adder having different gate delays'19935,053,642'Bus circuit and operating method thereof'1991

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1991–2005Patents assigned to MITSUBISHI ELECTRIC CORP (17)· patent assignee history
1991–2006Based in Hyogo, JP· patent location history
1997–1998Based in Itami, JP· patent location history
1999–2001Patents assigned to RICOH KK (2)· patent assignee history
1999–2005Based in Tokyo, JP· patent location history
2004–2006Patents assigned to RENESAS TECH CORP (7)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MITSUBISHI ELECTRIC CORP171991–2005
RENESAS TECH CORP72004–2006
RICOH KK21999–2001
Locations
LocationPatentsSpan
Hyogo, JP151991–2006
Tokyo, JP91999–2005
Itami, JP21997–1998