Inventor

Shih-Chang Liu

Inventor
Alian Township, TW

Overview

234→
Patents
1998–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 234 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices27%
H10BElectronic memory devices21%
H10DInorganic electric semiconductor devices19%
H10NElectric solid-state devices not otherwise provided for11%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
G11CStatic stores2%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation2%
B81BMicrostructural devices or systems, e.g. micromechanical devices1%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems1%
PatentTitleYear
11,050,021Method for manufacturing resistive random access memory structure202111,037,932Semiconductor arrangement having capacitor separated from active region202111,037,983Semiconductor structure and method of forming the same202111,018,299Memory cell having resistance variable film and method of making the same202111,010,697On-demand resource scheduling202110,879,463Phase change memory structure to reduce power consumption202010,870,574Method and apparatus for reducing in-process and in-use stiction for MEMS devices202010,872,895Method of manufacturing capacitor structure202010,868,028Flash memory structure with reduced dimension of gate structure and methods of forming thereof202010,868,024Method of forming embedded nonvolatile memory202010,840,438Reversed stack MTJ202010,840,2873DIC interconnect apparatus and method202010,825,825Flash memory structure202010,811,504Semiconductor structure for flash memory cells and method of making same202010,804,411Semiconductor device and method of forming the same202010,790,444Method for forming a phase change memory (PCM) cell with a low deviation contact area between a heater and a phase change element202010,763,304Semiconductor structure and method of forming the same202010,748,895Semiconductor arrangement and formation thereof202010,734,394Cell boundary structure for embedded memory202010,725,212Lens202010,720,568Semiconductor structure and method of manufacturing the same202010,720,571Magnetic memory structure and method of forming the same202010,665,600Memory devices and method of fabricating same202010,658,571Semiconductor structure and method for manufacturing the same202010,636,670Method of planarizing semiconductor device202010,629,811Resistance variable memory structure and method of forming the same202010,622,471Manufacturing method of semiconductor structure202010,573,811Resistive random-access memory (RRAM) cell with recessed bottom electrode sidewalls202010,553,785Magnetoresistive random access memory device and method of making same202010,535,814Techniques for MRAM MTJ top electrode connection202010,535,671Cell boundary structure for embedded memory202010,529,916Reversed stack MTJ202010,522,532Through via extending through a group III-V layer201910,516,026Split gate memory device and method of fabricating the same201910,516,107Memory cell having resistance variable film and method of making the same201910,510,763Embedded nonvolatile memory and forming method thereof201910,509,169Semiconductor structure and manufacturing method of the same201910,510,803Semiconductor memory device and method for fabricating the same201910,510,952Storage device with composite spacer and method for manufacturing the same201910,510,766Flash memory structure with reduced dimension of gate structure and methods of forming thereof201910,504,904Semiconductor arrangement with capacitor and method of fabricating the same201910,505,110Phase change memory structure to reduce power consumption201910,490,742Method for forming a phase change memory (PCM) cell with a low deviation contact area between a heater and a phase change element201910,490,460Semiconductor arrangement and method of forming201910,475,998Resistive random access memory structure201910,468,587Semiconductor structure, electrode structure and method of forming the same201910,461,089Cell boundary structure for embedded memory201910,454,021Semiconductor structure and method of manufacturing the same201910,453,932Semiconductor structure for flash memory cells and method of making same201910,361,2343DIC interconnect apparatus and method201910,355,011Method for forming flash memory structure201910,325,910Semiconductor device containing HEMT and MISFET and method of forming the same201910,304,848Flash memory structure with reduced dimension of gate structure201910,297,604Split gate memory devices and methods of manufacturing201910,283,700Semiconductor memory structure with magnetic tunnel junction (MTJ) cell201910,273,143Method and apparatus for reducing in-process and in-use stiction for MEMS devices201910,276,634Semiconductor memory structure with magnetic tunnel junction (MTJ) cell201910,276,584Method to control the common drain of a pair of control gates and to improve inter-layer dielectric (ILD) filling between the control gates201910,270,025Semiconductor structure having magnetic tunneling junction (MTJ) layer201910,269,575Semiconductor device with non-linear surface201910,269,807Semiconductor arrangement having capacitor separated from active region201910,181,558Magnetoresistive random access memory structure and method of forming the same201910,164,181Sidewall protection of memory cell201810,164,184Resistance variable memory structure and method of forming the same201810,158,073Manufacturing method of semiconductor structure201810,158,069Memory cell having resistance variable film and method of making the same201810,147,794Split gate memory device and method of fabricating the same201810,141,438Semiconductor structure and manufacturing method thereof201810,134,748Cell boundary structure for embedded memory201810,121,805Semiconductor structure and method for manufacturing the same201810,115,784Semiconductor device, MIM capacitor and associated fabricating method201810,056,448Coplanar metal-insulator-metal capacitive structure201810,049,890Semiconductor structure and method of manufacturing the same201810,048,220Biosensor field effect transistor having specific well structure and method of forming the same201810,032,828Semiconductor memory device and method for fabricating the same201810,026,741Logic-compatible memory cell manufacturing method and structure thereof201810,008,506Semiconductor arrangement with capacitor201810,003,022RRAM cell structure with conductive etch-stop layer20189,991,333Metal-insulator-metal (MIM) capacitor structure and method for forming the same20189,978,603Memory devices and method of fabricating same20189,978,761Self-aligned flash memory device20189,978,759Memory devices and method of forming same20189,975,757Wafer Level Hermetic Seal Process for microelectromechanical systems (MEMS) devices20189,978,754Semiconductor arrangement with capacitor20189,966,436Semiconductor device with non-linear surface20189,960,285Contact structure20189,954,100Method and apparatus for high voltate transistors20189,941,3203DIC interconnect apparatus and method20189,935,119Dual control gate spacer structure for embedded flash memory20189,917,165'Memory cell structure for improving erase speed'20189,911,734'Semiconductor device containing HEMT and MISFET and method of forming the same'20189,878,899'Method and apparatus for reducing in-process and in-use stiction for MEMS devices'20189,876,169RRAM devices and methods20189,865,610'Si recess method in HKMG replacement gate technology'20189,859,295'Method for forming flash memory structure'20189,853,091Side bottom contact RRAM structure20179,847,473MRAM structure for process damage minimization20179,837,605Memory cell having resistance variable film and method of making the same20179,837,606Resistance variable memory structure and method of forming the same20179,837,421Semiconductor arrangement having capacitor separated from active region20179,837,322Semiconductor arrangement and method of forming20179,825,040'Semiconductor arrangement with capacitor and method of fabricating the same'20179,825,224'RRAM device'20179,818,935'Techniques for MRAM MTJ top electrode connection'20179,806,254'Storage device with composite spacer and method for manufacturing the same'20179,799,665'Method for forming semiconductor device structure'20179,793,339'Method for preventing copper contamination in metal-insulator-metal (MIM) capacitors'20179,786,674'Discrete storage element formation for thin-film storage device'20179,768,220'Deep trench isolation structure for image sensors'20179,748,255'Split gate memory devices and methods of manufacturing'20179,741,868'Self-aligned split gate flash memory'20179,741,728'Method for forming a split-gate flash memory cell device with a low power logic device'20179,735,245'Recessed salicide structure to integrate a flash memory device with a high κ, metal gate logic device'20179,728,545'Method for preventing floating gate variation'20179,728,719'Leakage resistant RRAM/MIM structure'20179,716,097'Techniques to avoid or limit implant punch through in split gate flash memory devices'20179,711,508'Capacitor structure and method of manufacturing the same'20179,711,713'Semiconductor structure, electrode structure and method of forming the same'20179,691,883'Asymmetric formation approach for a floating gate of a split gate flash memory structure'20179,685,604'Magnetoresistive random access memory cell and fabricating the same'20179,679,979'Semiconductor structure for flash memory cells and method of making same'20179,673,204'Semiconductor device structure and method for forming the same'20179,673,205'Embedded nonvolatile memory and forming method thereof'20179,673,194'Semiconductor arrangement and formation thereof'20179,666,661'Coplanar metal-insulator-metal capacitive structure'20179,660,188'Phase change memory structure to reduce leakage from the heating element to the surrounding material'20179,653,471'Pattern layout to prevent split gate flash memory cell failure'20179,653,682'Resistive random access memory structure'20179,646,978'Self-aligned flash memory device with word line having reduced height at outer edge opposite to gate stack'20179,620,372'HK embodied flash memory and methods of forming the same'20179,620,582'Metal-insulator-metal (MIM) capacitors and forming methods'20179,614,048'Split gate flash memory structure and method of making the split gate flash memory structure'20179,614,145'Reversed stack MTJ'20179,608,195'Magnetic tunnel junction device'20179,595,661'Magnetoresistive random access memory structure and method of forming the same'20179,589,976'Structure and method to reduce polysilicon loss from flash memory devices during replacement gate (RPG) process in integrated circuits'20179,583,591'Si recess method in HKMG replacement gate technology'20179,567,207'Recess with tapered sidewalls for hermetic seal in MEMS devices'20179,570,454'Structure with emedded EFS3 and FinFET device'20179,570,457'Method to control the common drain of a pair of control gates and to improve inter-layer dielectric (ILD) filling between the control gates'20179,564,448'Flash memory structure'20179,564,577'MRAM device and fabrication method'20179,559,177'Memory devices and method of fabricating same'20179,559,294'Self-aligned magnetoresistive random-access memory (MRAM) structure for process damage minimization'20179,553,096'Semiconductor arrangement with capacitor'20179,553,154'Memory devices and method of fabricating same'20179,543,511'RRAM device'20179,536,969'Self-aligned split gate flash memory'20179,536,888'Method to prevent oxide damage and residue contamination for memory device'20179,525,130'Phase change memory and method of fabricating same'20169,508,722'Semiconductor arrangment with capacitor'20169,502,515'Split gate flash memory structure with a damage free select gate and a method of making the split gate flash memory structure'20169,502,514'Memory devices and method of forming same'20169,496,276'CMP fabrication solution for split gate memory embedded in HK-MG process'20169,484,351'Split gate memory device and method of fabricating the same'20169,484,352'Method for forming a split-gate flash memory cell device with a low power logic device'20169,472,645'Dual control gate spacer structure for embedded flash memory'20169,466,663'Semiconductor arrangement having capacitor separated from active region'20169,450,057'Split gate cells for embedded flash memory'20169,431,603'RRAM device'20169,425,044'Composite spacer for silicon nanocrystal memory storage'20169,425,206'Boundary scheme for embedded poly-SiON CMOS or NVM in HKMG CMOS technology'20169,419,218'Resistance variable memory structure and method of forming the same'20169,418,901'Semiconductor device containing HEMT and MISFET and method of forming the same'20169,406,883'Structure and formation method of memory device'20169,397,228'Semiconductor device structure and method for forming the same'20169,391,151'Split gate memory device for improved erase speed'20169,391,085'Self-aligned split gate flash memory having liner-separated spacers above the memory gate'20169,356,142'Pattern layout to prevent split gate flash memory cell failure'20169,356,231'MRAM device and fabrication method thereof'20169,306,158'MRAM device and fabrication method thereof'20169,299,768'Semiconductor device with non-linear surface'20169,299,927'Memory cell having resistance variable film and method of making the same'20169,299,784'Semiconductor device with non-linear surface'20169,293,392'3DIC interconnect apparatus and method'20169,287,279'Silicon nitride (SiN) encapsulating layer for silicon nanocrystal memory storage'20169,269,829'Split gate flash memory structure with a damage free select gate and a method of making the split gate flash memory structure'20169,257,498'Process to improve performance for metal-insulator-metal (MIM) capacitors'20169,257,571'Memory gate first approach to forming a split gate flash memory cell device'20169,257,568'Structure for flash memory cells'20169,209,392'RRAM cell with bottom electrode'20159,196,825'Reversed stack MTJ'20159,178,144'RRAM cell with bottom electrode'20159,172,033'MRAM device and fabrication method thereof'20159,166,153'System and process to remove film from semiconductor devices'20159,159,842'Embedded nonvolatile memory'20159,142,761'Method for fabricating a magnetic tunnel junction device'20159,136,393'HK embodied flash memory and methods of forming the same'20159,130,156'Process to remove film from semiconductor devices'20159,087,981'Methods of forming a magnetic tunnel junction device'20159,082,651'Memory devices and method of forming same'20159,076,681'Memory devices and method of fabricating same'20159,048,316'Flash memory structure and method of forming the same'20159,040,951'Resistance variable memory structure and method of forming the same'20158,999,777'Method of conducting a direction-specific trimming process for contact patterning'20158,999,833'Method and apparatus for controlling gate dimensions of memory devices'20158,987,033'Method for forming CMOS image sensors'20158,932,897'Phase change memory cell'20158,932,900'Phase change memory and method of fabricating same'20158,921,959'MRAM device and fabrication method thereof'20148,912,573'Semiconductor device containing HEMT and MISFET and method of forming the same'20148,889,460'Sidewall for backside illuminated image sensor metal grid and method of manufacturing same'20148,872,149'RRAM structure and process using composite spacer'20148,853,768'Method of fabricating MONOS semiconductor device'20148,822,237'Hole first hardmask definition'20148,710,560'Embedded bonding pad for image sensors'20148,685,783'Phase change memory cell'20148,629,531'Structure and method to reduce wafer warp for gallium nitride on silicon wafer'20148,610,227'Formation of embedded micro-lens'20138,610,229'Sidewall for backside illuminated image sensor metal grid and method of manufacturing same'20138,569,849'Hole first hardmask definition'20138,501,572'Spacer structure for transistor device and method of manufacturing same'20138,445,953'Structure for flash memory cells'20138,313,959'Hole first hardmask definition'20128,288,750'Phase change memory device with air gap'20128,278,122'Method for forming MTJ cells'20128,273,625'Structure for flash memory cells'20128,258,545'Integrated circuit including a bipolar transistor and methods of making the same'20128,227,850'Gated semiconductor device and method of fabricating same'20128,114,740'Profile of flash memory cells'20127,928,499'Profile of flash memory cells'20117,785,966'Method for fabricating floating gates structures with reduced and more uniform forward tunneling voltages'20107,700,473'Gated semiconductor device and method of fabricating same'20107,687,794'Method and structure for uniform contact area between heater and phase change material in PCRAM device'20107,667,261'Split-gate memory cells and fabrication methods thereof'20107,652,318'Split-gate memory cells and fabrication methods thereof'20107,563,675'Ladder poly etching back process for word line poly planarization'20097,297,598'Process for erase improvement in a non-volatile memory device'20077,253,470'Floating gate with unique profile by means of undercutting for split-gate flash memory device'20077,153,755'Process to improve programming of memory cells'20067,144,773'Method for preventing trenching in fabricating split gate flash devices'20066,924,199'Method to form flash memory with very narrow polysilicon spacing'20055,933,343'Multi-deck power converter module'19995,812,387'Multi-deck power converter module'1998

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1998–1999Based in Brighton, MA, US· patent location history
2005–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (54)· patent assignee history
2005–2021Based in Kaohsiung, TW· patent location history
2009–2021Based in Alian Township, TW· patent location history
2010–2018Based in Yuku Village, TW· patent location history
2012–2015Patents assigned to LIU SHIH-CHANG (18)· patent assignee history
2012–2015Patents assigned to TSAI CHIA-SHIUNG (16)· patent assignee history
2012–2013Patents assigned to LO CHI-HSIN (4)· patent assignee history
2012–2020Based in Hsinchu, TW· patent location history
2015–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (176)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD1762015–2021
TAIWAN SEMICONDUCTOR MFG542005–2016
LIU SHIH-CHANGself182012–2015
TSAI CHIA-SHIUNG162012–2015
LO CHI-HSIN42012–2013
Locations
LocationPatentsSpan
Alian Township, TW1592009–2021
Kaohsiung, TW632005–2021
Hsinchu, TW32012–2020
Yuku Village, TW22010–2018
Brighton, Massachusetts, US21998–1999