Inventor

Alexander Fritsch

Inventor
Esslingen, DE

Overview

23→
Patents
2013–2021
Patent span
Physics
Primary field (CPC G)

Patents· 23 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores50%
G06FElectric digital data processing14%
H10BElectronic memory devices14%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
H01LSemiconductor devices7%
H03FAmplifiers5%
PatentTitleYear
10,984,160Analysis and modification of circuit designs202110,832,763Global bit line latch performance and power optimization202010,614,884Content addressable memory with match hit quality indication202010,529,388Current-mode sense amplifier202010,347,337Content addressable memory with match hit quality indication201910,096,346Current-mode sense amplifier201810,002,661Structure for reducing pre-charge voltage for static random-access memory arrays20189,892,789'Content addressable memory with match hit quality indication'20189,767,872'Current-mode sense amplifier and reference current circuitry'20179,761,286'Current-mode sense amplifier'20179,727,680'Structure for reducing pre-charge voltage for static random-access memory arrays'20179,721,050'Structure for reducing pre-charge voltage for static random-access memory arrays'20179,721,049'Structure for reducing pre-charge voltage for static random-access memory arrays'20179,666,278'Content addressable memory array comprising geometric footprint and RAM cell block located between two parts of a CAM cell block'20179,595,304'Current-mode sense amplifier'20179,589,604'Single ended bitline current sense amplifier for SRAM applications'20179,564,188'Current-mode sense amplifier and reference current circuitry'20179,552,851'Current-mode sense amplifier'20179,536,608'Content addressable memory device'20179,484,073'Current-mode sense amplifier'20169,431,096'Hierarchical negative bitline boost write assist for SRAM memory devices'20169,431,098'Structure for reducing pre-charge voltage for static random-access memory arrays'20168,493,812'Boost circuit for generating an adjustable boost voltage'2013

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2013–2021Patents assigned to IBM (23)· patent assignee history
2013Patents assigned to DENGLER OSAMA (1)· patent assignee history
2013Patents assigned to FRITSCH ALEXANDER (1)· patent assignee history
2013Patents assigned to PENTH WOLFGANG (1)· patent assignee history
2013Patents assigned to PILLE JUERGEN (1)· patent assignee history
2013–2021Based in Esslingen, DE· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM232013–2021
DENGLER OSAMA12013
FRITSCH ALEXANDERself12013
PENTH WOLFGANG12013
PILLE JUERGEN12013
Locations
LocationPatentsSpan
Esslingen, DE232013–2021