Inventor
Paul A. Lauro
Inventor
Brewster, NY, US
Overview
Patents· 121 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1018%
Y10TTechnical subjects covered by former us classification13%
G01RMeasuring electric variables9%
H05KPrinted circuits9%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h109%
H01LSemiconductor devices7%
B23KSoldering or unsoldering5%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation5%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution5%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
PatentTitleYear
11,110,534Continuous solder transfer to substrates202110,892,333Method of making a gallium nitride device202110,581,037Low-profile battery construct with engineered interfaces202010,424,644Method of making a gallium nitride device201910,249,792Protective capping layer for spalled gallium nitride201910,147,694Direct injection molded solder process for forming solder bumps on wafers201810,026,618Method for improving quality of spalled material layers201810,020,418Simplified process for vertical LED manufacturing20189,929,313'Protective capping layer for spalled gallium nitride'20189,918,382'Patterned metallization handle layer for controlled spalling'20189,748,353'Method of making a gallium nitride device'20179,722,039'Fabricating high-power devices'20179,713,250'Patterned metallization handle layer for controlled spalling'20179,578,736'Patterned metallization handle layer for controlled spalling'20179,570,295'Protective capping layer for spalled gallium nitride'20179,564,335'Method for improving quality of spalled material layers'20179,502,278'Substrate holder assembly for controlled layer transfer'20169,502,609'Simplified process for vertical LED manufacturing'20169,455,180'Controlled spalling of fine features'20169,404,942'Coaxial probe structure of elongated electrical conductors projecting from a support structure'20169,308,714'Method for improving surface quality of spalled substrates'20169,295,166'Double solder bumps on substrates for low temperature flip chip bonding'20169,273,408'Direct injection molded solder process for forming solder bumps on wafers'20169,275,867'Method for improving quality of spalled material layers'20169,263,363'Self orienting micro plates of thermally conducting material as component in thermal paste or adhesive'20169,095,081'Double solder bumps on substrates for low temperature flip chip bonding'20159,082,762'Electromigration-resistant under-bump metallization of nickel-iron alloys for Sn-rich solder bumps in Pb-free flip-clip'20159,040,432'Method for facilitating crack initiation during controlled substrate spalling'20158,987,132'Double solder bumps on substrates for low temperature flip chip bonding'20158,969,174'Fixed curvature force loading of mechanically spalled films'20158,944,306'Forming metal preforms and metal balls'20158,936,961'Removal of stressor layer from a spalled layer and method of making a bifacial solar cell using the same'20158,916,450'Method for improving quality of spalled material layers'20148,841,203'Method for forming two device wafers from a single base substrate utilizing a controlled spalling process'20148,833,636'Forming an array of metal balls or shapes on a substrate'20148,828,860'Double solder bumps on substrates for low temperature flip chip bonding'20148,754,666'Probe structure having a plurality of discrete insulated probe tips projecting from a support surface, apparatus for use thereof and methods of fabrication thereof'20148,748,296'Edge-exclusion spalling method for improving substrate reusability'20148,709,957'Spalling utilizing stressor layer portions'20148,709,914'Method for controlled layer transfer'20148,679,943'Fixed curvature force loading of mechanically spalled films'20148,604,623'Self orienting micro plates of thermally conducting material as component in thermal paste or adhesive'20138,561,880'Forming metal preforms and metal balls'20138,523,046'Forming an array of metal balls or shapes on a substrate'20138,492,262'Direct IMS (injection molded solder) without a mask for forming solder bumps on substrates'20138,491,772'Redox method of forming a coaxial probe structure of elongated electrical conductors projecting from a support structure'20138,486,250'Electrodeposition method of forming a probe structure having a plurality of discrete insulated probe tips projecting from a support surface'20138,450,184'Thin substrate fabrication using stress-induced spalling'20138,381,962'Injection molded solder method for forming solder bumps on substrates'20138,376,207'Micro-fluidic injection molded solder (IMS)'20138,314,500'Interconnections for flip-chip using lead-free solders and having improved reaction barrier layers'20128,268,282'Self orienting micro plates of thermally conducting material as component in thermal paste or adhesive'20128,247,261'Thin substrate fabrication using stress-induced substrate spalling'20128,241,957'Negative thermal expansion system (NTES) device for TCE compensation in elastomer composites and conductive elastomer interconnects in microelectronic packaging'20128,162,200'Micro-fluidic injection molded solder (IMS)'20128,156,998'Patterned metal thermal interface'20128,136,714'Micro-fluidic injection molded solder (IMS)'20128,026,613'Interconnections for flip-chip using lead-free solders and having reaction barrier layers'20118,003,512'Structure of UBM and solder bumps and methods of fabrication'20117,980,446'Micro-fluidic injection molded solder (IMS)'20117,978,473'Cooling apparatus with cold plate formed in situ on a surface to be cooled'20117,931,187'Injection molded solder method for forming solder bumps on substrates'20117,932,169'Interconnection for flip-chip using lead-free solders and having improved reaction barrier layers'20117,923,849'Interconnections for flip-chip using lead-free solders and having reaction barrier layers'20117,906,420'Method and apparatus for forming planar alloy deposits on a substrate'20117,898,076'Structure and methods of processing for solder thermal interface materials for chip cooling'20117,883,919'Negative thermal expansion system (NTEs) device for TCE compensation in elastomer compsites and conductive elastomer interconnects in microelectronic packaging'20117,867,842'Method and apparatus for forming planar alloy deposits on a substrate'20117,823,278'Method for fabricating electrical contact buttons'20107,736,152'Land grid array fabrication using elastomer core and conducting metal shell or mesh'20107,731,079'Cooling apparatus and method of fabrication thereof with a cold plate formed in situ on a surface to be cooled'20107,708,909'Self orienting micro plates of thermally conducting material as component in thermal paste or adhesive'20107,694,719'Patterned metal thermal interface'20107,648,369'Interposer with electrical contact button and method'20107,556,979'Negative thermal expansion system (NTEs) device for TCE compensation in elastomer composites and conductive elastomer interconnects in microelectronic packaging'20097,538,565'High density integrated circuit apparatus, test probe and methods of use thereof'20097,523,852'Solder interconnect structure and method using injection molded solder'20097,495,342'Angled flying lead wire bonding process'20097,479,014'Land grid array fabrication using elastomer core and conducting metal shell or mesh'20097,417,315'Negative thermal expansion system (NTEs) device for TCE compensation in elastomer composites and conductive elastomer interconnects in microelectronic packaging'20087,410,833'Interconnections for flip-chip using lead-free solders and having reaction barrier layers'20087,368,924'Probe structure having a plurality of discrete insulated probe tips projecting from a support surface, apparatus for use thereof and methods of fabrication thereof'20087,351,360'Self orienting micro plates of thermally conducting material as component in thermal paste or adhesive'20087,332,922'Method for fabricating a structure for making contact with a device'20087,282,945'Wafer scale high density probe assembly, apparatus for use thereof and methods of fabrication thereof'20077,276,919'High density integral test probe'20077,172,431'Electrical connector design and contact geometry and method of use thereof and methods of fabrication thereof'20077,137,827'Interposer with electrical contact button and method'20066,891,360'Plated probe structure'20056,880,245'Method for fabricating a structure for making contact with an IC device'20056,722,032'Method of forming a structure for electronic devices contact locations'20046,708,403'Angled flying lead wire bonding process'20046,526,655'Angled flying lead wire bonding process'20036,528,984'Integrated compliant probe for wafer level test and burn-in'20036,523,255'Process and structure to repair damaged probes mounted on a space transformer'20036,525,551'Probe structures for testing electrical interconnections to integrated circuit electronic devices'20036,452,406'Probe structure having a plurality of discrete insulated probe tips'20026,334,247'High density integrated circuit apparatus, test probe and methods of use thereof'20026,332,270'Method of making high density integral test probe'20016,329,827'High density cantilevered probe for electronic devices'20016,300,780'High density integrated circuit apparatus, test probe and methods of use thereof'20016,295,729'Angled flying lead wire bonding process'20016,286,208'Interconnector with contact pads having enhanced durability'20016,206,273'Structures and processes to create a desired probetip contact geometry on a wafer test probe'20016,104,201'Method and apparatus for passive characterization of semiconductor substrates subjected to high energy (MEV) ion implementation using high-injection surface photovoltage'20006,078,500'Pluggable chip scale package'20006,062,879'High density test probe with rigid surface structure'20006,054,651'Foamed elastomers for wafer probing applications and interposer connectors'20005,914,614'High density cantilevered probe for electronic devices'19995,838,160'Integral rigid chip test probe'19985,821,763'Test probe for high density integrated circuits, methods of fabrication thereof and methods of use thereof'19985,810,607'Interconnector with contact pads having enhanced durability'19985,811,982'High density cantilevered probe for electronic devices'19985,785,538'High density test probe with rigid surface structure'19985,635,846'Test probe having elongated conductor embedded in an elostomeric material which is mounted on a space transformer'19975,531,022'Method of forming a three dimensional high performance interconnection package'19965,490,518'Leg length analyzer'19965,371,654'Three dimensional high performance interconnection package'19945,185,073'Method of fabricating nendritic materials'19935,137,461'Separable electrical connection technology'19925,053,272'Optical storage device'1991Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1991–2021Patents assigned to IBM (114)· patent assignee history
1991–1993Based in Pomona, NY, US· patent location history
1994–2016Based in Nanuet, NY, US· patent location history
2006–2021Based in Brewster, NY, US· patent location history
2007Based in Browster, NY, US· patent location history
2012–2016Patents assigned to LAURO PAUL A (21)· patent assignee history
2012–2015Patents assigned to BEDELL STEPHEN W (9)· patent assignee history
2012–2015Patents assigned to FOGEL KEITH E (9)· patent assignee history
2012–2016Patents assigned to NAH JAE-WOONG (8)· patent assignee history
2012–2015Based in Armonk, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 114 | 1991–2021 |
| LAURO PAUL Aself | 21 | 2012–2016 |
| BEDELL STEPHEN W | 9 | 2012–2015 |
| FOGEL KEITH E | 9 | 2012–2015 |
| NAH JAE-WOONG | 8 | 2012–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Brewster, New York, US | 74 | 2006–2021 |
| Nanuet, New York, US | 40 | 1994–2016 |
| Armonk, New York, US | 3 | 2012–2015 |
| Pomona, New York, US | 3 | 1991–1993 |
| Browster, New York, US | 1 | 2007 |