Inventor
Jean Y. Yang
Inventor
Sunnyvale, CA, US
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices40%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1030%
H10DInorganic electric semiconductor devices10%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests10%
PatentTitleYear
7,998,846'3-D integrated circuit system and method'20117,157,335'Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone to improve charge loss and contact resistance in multi bit memory devices'20077,091,088'UV-blocking etch stop layer for reducing UV-induced charging of charge storage layer in memory devices in BEOL processing'20066,894,342'Structure and method for preventing UV radiation damage in a memory cell and improving contact CD control'20056,833,581'Structure and method for preventing process-induced UV radiation damage in a memory cell'2004Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004–2011Patents assigned to SPANSION LLC (5)· patent assignee history
2004–2007Based in Sunnyvale, CA, US· patent location history
2011Based in Glendale, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SPANSION LLC | 5 | 2004–2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| Sunnyvale, California, US | 4 | 2004–2007 |
| Glendale, California, US | 1 | 2011 |