Inventor

Steven Hung

Inventor
Sunnyvale, CA, US

Overview

17→
Patents
2008–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 17 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices33%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1029%
H01LSemiconductor devices23%
C23CCoating metallic material6%
H01JElectric discharge tubes or discharge lamps4%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation2%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h102%
PatentTitleYear
10,872,763Treatments to enhance material structures202010,510,545Hydrogenation and nitridization processes for modifying effective oxide thickness of a film201910,431,466Hydrogenation and nitridization processes for modifying effective oxide thickness of a film201910,347,492Modifying work function of a metal film with a plasma process20199,748,354'Multi-threshold voltage structures with a lanthanum nitride film and methods of formation thereof'20179,437,640'Engineering induced tunable electrostatic effect'20169,373,516'Method and apparatus for forming gate stack on Si, SiGe or Ge channels'20169,275,853'Method of adjusting a transistor gate flat band voltage with addition of AL203 on nitrided silicon channel'20169,269,574'Methods of fabricating dielectric films from metal amidinate precursors'20169,269,633'Method for forming gate electrode with depletion suppression and tunable workfunction'20168,927,438'Methods for manufacturing high dielectric constant films'20157,867,859'Gate electrode with depletion suppression and tunable workfunction'20117,837,838'Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus'20107,678,710'Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system'20107,645,710'Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system'20107,541,650'Gate electrode structures'20097,317,229'Gate electrode structures and methods of manufacture'2008

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2008–2020Patents assigned to APPLIED MATERIALS INC (15)· patent assignee history
2008–2020Based in Sunnyvale, CA, US· patent location history
2011–2016Patents assigned to UNIV LELAND STANFORD JUNIOR (2)· patent assignee history
2011–2016Based in San Francisco, CA, US· patent location history
2015–2016Patents assigned to HUNG STEVEN (3)· patent assignee history
2015–2016Patents assigned to NOORI ATIF (2)· patent assignee history
2015–2016Patents assigned to THOMPSON DAVID (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
APPLIED MATERIALS INC152008–2020
HUNG STEVENself32015–2016
NOORI ATIF22015–2016
THOMPSON DAVID22015–2016
UNIV LELAND STANFORD JUNIOR22011–2016
Locations
LocationPatentsSpan
Sunnyvale, California, US152008–2020
San Francisco, California, US22011–2016