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Inventor

Eddy Pramono

Inventor
Santa Clara, CA, US

Overview

11→
Patents
2005–2017
Patent span
Physics
Primary field (CPC G)

Patents· 11 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing92%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
PatentTitleYear
9,582,626'Using waveform propagation for accurate delay calculation'20178,694,934'Method and apparatus for multi-die thermal analysis'20148,566,760'Method and apparatus for multi-die thermal analysis'20138,543,952'Method and apparatus for thermal analysis of through-silicon via (TSV)'20138,504,958'Method and apparatus for thermal analysis'20138,201,113'Method and apparatus for multi-die thermal analysis'20128,104,007'Method and apparatus for thermal analysis'20128,104,006'Method and apparatus for thermal analysis'20128,103,996'Method and apparatus for thermal analysis of through-silicon via (TSV)'20127,024,644'IC signal path resistance estimation method'20066,925,619'IC conductor capacitance estimation method'2005

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2005–2017Patents assigned to CADENCE DESIGN SYSTEMS INC (11)· patent assignee history
2005–2017Based in Santa Clara, CA, US· patent location history
2012–2014Patents assigned to KARIAT VINOD (8)· patent assignee history
2012–2014Patents assigned to PRAMONO EDDY (8)· patent assignee history
2012–2014Patents assigned to ZHAN YONG (7)· patent assignee history
2012Patents assigned to KELLER IGOR (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
CADENCE DESIGN SYSTEMS INC112005–2017
KARIAT VINOD82012–2014
PRAMONO EDDYself82012–2014
ZHAN YONG72012–2014
KELLER IGOR12012
Locations
LocationPatentsSpan
Santa Clara, California, US112005–2017