Inventor
Kouji Maemura
Inventor
Kanagawa, JP
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
5,559,985'Cache memory having improved hit ratio by selecting the number of bus cycles required for block replacement'19965,544,307'Microcomputer development support system operable with only background monitor and without cache replacement'19965,535,350'Cache memory unit including a replacement address register and address update circuitry for reduced cache overhead'19965,455,936'Debugger operable with only background monitor'19955,421,026'Data processor for processing instruction after conditional branch instruction at high speed'19955,247,624'Microprogram controller including leading microinstruction from a generator executed while succeeding microinstruction from memory is read out'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–1996Patents assigned to NEC CORP (6)· patent assignee history
1993–1995Based in Tokyo, JP· patent location history
1995–1996Based in Kanagawa, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NEC CORP | 6 | 1993–1996 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kanagawa, JP | 4 | 1995–1996 |
| Tokyo, JP | 2 | 1993–1995 |