Inventor
HUANG-SHENG LIN
Inventor
TW
Overview
Patents· 4 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices31%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1031%
H10DInorganic electric semiconductor devices23%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
PatentTitleYear
12,341,071Dummy patterns in redundant region of double seal ring202512,300,635Semiconductor device having functional patterns in redundant regions of double seal ring202511,855,010Semiconductor structure and method for forming features in redundant region of double seal ring202311,728,229Dummy patterns in redundant region of double seal ring2023Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2023–2025Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (4)· patent assignee history
2023–2025Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 4 | 2023–2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 4 | 2023–2025 |