Inventor
Tokuo Kure
Inventor
Tokyo, JP
Overview
Patents· 61 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices23%
H10DInorganic electric semiconductor devices17%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
H01JElectric discharge tubes or discharge lamps12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
G11CStatic stores7%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
G01BMeasuring length, thickness or similar linear dimensions4%
G01NInvestigating or analysing materials by determining their chemical or physical properties2%
C23FNon-mechanical removal of metallic material from surface2%
PatentTitleYear
9,744,569'Method for cleaning piping and cleaning system for piping'20177,259,104'Sample surface processing method'20077,105,409'Semiconductor integrated circuit device and process for producing the same'20067,049,243'Surface processing method of a specimen and surface processing apparatus of the specimen'20066,878,586'Semiconductor memory device'20056,849,191'Method and apparatus for treating surface of semiconductor'20056,797,566'Semiconductor integrated circuit device and process for producing the same'20046,767,838'Method and apparatus for treating surface of semiconductor'20046,677,244'Specimen surface processing method'20046,660,647'Method for processing surface of sample'2003RE038296'Semiconductor memory device with recessed array region'20036,525,336'Superfine electronic device and method for making same'20036,492,277'Specimen surface processing method and apparatus'20026,355,517'Method for fabricating semiconductor memory with a groove'20026,114,695'Scanning electron microscope and method for dimension measuring by using the same'20005,969,357'Scanning electron microscope and method for dimension measuring by using the same'19995,877,498'Method and apparatus for X-ray analyses'19995,866,904'Scanning electron microscope and method for dimension measuring by using the same'19995,658,811'Method of manufacturing a semiconductor device'19975,594,246'Method and apparatus for x-ray analyses'19975,594,245'Scanning electron microscope and method for dimension measuring by using the same'19975,591,998'Semiconductor memory device'19975,583,358'Semiconductor memory device having stacked capacitors'19965,481,109'Surface analysis method and apparatus for carrying out the same'19965,412,210'Scanning electron microscope and method for production of semiconductor device by using the same'19955,374,576'Method of fabricating stacked capacitor cell memory devices'19945,357,131'Semiconductor memory with trench capacitor'19945,357,464'Semiconductor memory having writing and reading transistors, method of fabrication thereof, and method of use thereof'19945,352,324'Etching method and etching apparatus therefor'19945,317,168'Superconducting field effect transistor'19945,296,729'Semiconductor memory device having static random access memory'19945,237,528'Semiconductor memory'19935,214,496'Semiconductor memory'19935,200,635'Semiconductor device having a low-resistivity planar wiring structure'19935,196,910'Semiconductor memory device with recessed array region'19935,188,976'Manufacturing method of non-volatile semiconductor memory device'19935,177,576'Dynamic random access memory having trench capacitors and vertical transistors'19935,140,389'Semiconductor memory device having stacked capacitor cells'19925,128,743'Semiconductor device and method of manufacturing the same'19925,091,761'Semiconductor device having an arrangement of IGFETs and capacitors stacked thereover'19925,061,645'Method of manufacturing a bipolar transistor'19915,053,849'Transistor with overlapping gate/drain and two-layered gate structures'19915,017,981'Semiconductor memory and method for fabricating the same'19914,985,114'Dry etching by alternately etching and depositing'19914,984,048'Semiconductor device with buried side contact'19914,984,030'Vertical MOSFET DRAM'19914,984,038'Semiconductor memory and method of producing the same'19914,970,564'Semiconductor memory device having stacked capacitor cells'19904,937,641'Semiconductor memory and method of producing the same'19904,926,235'Semiconductor device'19904,901,128'Semiconductor memory'19904,882,289'Method of making a semiconductor memory device with recessed array region'19894,873,203'Method for formation of insulation film on silicon buried in trench'19894,860,071'Semiconductor memory using trench capacitor'19894,829,361'Semiconductor device'19894,825,281'Bipolar transistor with sidewall bare contact structure'19894,812,894'Semiconductor device'19894,751,557'Dram with FET stacked over capacitor'19884,635,090'Tapered groove IC isolation'19874,529,476'Gas for selectively etching silicon nitride and process for selectively etching silicon nitride with the gas'19854,396,460'Method of forming groove isolation in a semiconductor device'1983Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1983–2017Patents assigned to HITACHI LTD (57)· patent assignee history
1983–2002Based in Kokubunji, JP· patent location history
1989–2017Based in Tokyo, JP· patent location history
1990Patents assigned to HAYASHIDA TETSUYA (1)· patent assignee history
1990–2005Based in Nishitama-gun, JP· patent location history
1991Based in Kokunbunji, JP· patent location history
1994Patents assigned to HITACHI VLSI ENG (1)· patent assignee history
2002–2006Based in Hinode, JP· patent location history
2004–2006Patents assigned to RENESAS TECH CORP (3)· patent assignee history
2004Patents assigned to HITACHI DEVICE ENGINEERING COR (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HITACHI LTD | 57 | 1983–2017 |
| RENESAS TECH CORP | 3 | 2004–2006 |
| HAYASHIDA TETSUYA | 1 | 1990 |
| HITACHI DEVICE ENGINEERING COR | 1 | 2004 |
| HITACHI VLSI ENG | 1 | 1994 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 23 | 1989–2017 |
| Kokubunji, JP | 21 | 1983–2002 |
| Nishitama-gun, JP | 8 | 1990–2005 |
| Hinode, JP | 6 | 2002–2006 |
| Kokunbunji, JP | 1 | 1991 |