Inventor
Chun-Chi Lee
Inventor
Kaohsiung, TW
Overview
Patents· 45 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1048%
H05KPrinted circuits10%
B23KSoldering or unsoldering8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation4%
H04LTransmission of digital information, e.g. telegraphic communication3%
Y10TTechnical subjects covered by former us classification3%
B29CShaping or joining of plastics1%
B29LIndexing scheme associated with subclass b29c, relating to particular articles1%
B60LPropulsion of electrically-propelled vehicles1%
PatentTitleYear
10,920,783Rotor assembly for motor202110,522,585Method for manufacturing CMOS image sensor20198,654,675'Interface detection device and detection method employing the same'20148,300,539'Switching device and loopback detecting method'20127,285,434'Semiconductor package and method for manufacturing the same'20077,186,110'Apparatus of making wedged plates'20077,064,428'Wafer-level package structure'20066,989,326'Bump manufacturing method'20066,989,299'Method of fabricating on-chip spacers for a TFT panel'20066,967,153'Bump fabrication process'20056,946,729'Wafer level package structure with a heat slug'20056,927,964'Structure for preventing burnt fuse pad from further electrical connection'20056,891,274'Under-bump-metallurgy layer for improving adhesion'20056,877,653'Method of modifying tin to lead ratio in tin-lead bump'20056,875,683'Method of forming bump'20056,864,168'Bump and fabricating process thereof'20056,863,208'Wire bonding process and wire bond structure'20056,861,346'Solder ball fabricating process'20056,846,719'Process for fabricating wafer bumps'20056,827,252'Bump manufacturing method'20046,819,002'Under-ball-metallurgy layer'20046,777,309'Method for fabricating thin film transistor display device'20046,756,256'Method for preventing burnt fuse pad from further electrical connection'20046,743,707'Bump fabrication process'20046,732,912'Solder ball attaching process'20046,723,630'Solder ball fabrication process'20046,724,075'Semiconductor chip package and manufacturing method thereof'20046,720,244'Bump fabrication method'20046,716,739'Bump manufacturing method'20046,714,421'Flip chip package substrate'20046,713,320'Bumping process'20046,692,581'Solder paste for fabricating bump'20046,673,711'Solder ball fabricating process'20046,664,128'Bump fabrication process'20036,617,237'Lead-free bump fabrication process'20036,561,411'Wire bonding process and wire bond structure'20036,469,399'Semiconductor package'20026,429,049'Laser method for forming vias'20026,420,244'Method of making wafer level chip scale package'20026,312,976'Method for manufacturing leadless semiconductor chip package'20016,291,271'Method of making semiconductor chip package'20016,271,057'Method of making semiconductor chip package'20016,201,299'Substrate structure of BGA semiconductor package'20016,191,360'Thermally enhanced BGA package'20016,163,076'Stacked structure of semiconductor package'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2007Patents assigned to ADVANCED SEMICONDUCTOR ENG (37)· patent assignee history
2000–2007Based in Kaohsiung, TW· patent location history
2004–2012Based in Taipei, TW· patent location history
2005Patents assigned to ADVANCED SEMICONDUCTOR ENIGNEE (1)· patent assignee history
2007–2014Patents assigned to LEE CHUN-CHI (3)· patent assignee history
2007Patents assigned to CHEN CHIH-LUNG (1)· patent assignee history
2012–2014Patents assigned to HON HAI PREC IND CO LTD (2)· patent assignee history
2014Based in New Taipei, TW· patent location history
2019Based in Tainan, TW· patent location history
2021Based in Gyeonggi-do, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ADVANCED SEMICONDUCTOR ENG | 37 | 2000–2007 |
| LEE CHUN-CHIself | 3 | 2007–2014 |
| HON HAI PREC IND CO LTD | 2 | 2012–2014 |
| ADVANCED SEMICONDUCTOR ENIGNEE | 1 | 2005 |
| CHEN CHIH-LUNG | 1 | 2007 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kaohsiung, TW | 37 | 2000–2007 |
| Taipei, TW | 4 | 2004–2012 |
| Gyeonggi-do, KR | 1 | 2021 |
| Tainan, TW | 1 | 2019 |
| New Taipei, TW | 1 | 2014 |