Inventor

Thomas R. Glass

Inventor
Idaho City, ID, US

Overview

27→
Patents
1989–2009
Patent span
Electricity
Primary field (CPC H)

Patents· 27 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices14%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests13%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
Y10TTechnical subjects covered by former us classification10%
G01NInvestigating or analysing materials by determining their chemical or physical properties8%
F01BMachines or engines, in general or of positive-displacement type, e.g. steam engines4%
F01LCyclically operating valves for machines or engines4%
H10BElectronic memory devices4%
H10DInorganic electric semiconductor devices4%
PatentTitleYear
7,576,400'Circuitry and gate stacks'20097,387,866'Photolithography process using multiple anti-reflective coatings'20087,315,074'Use of DAR coating to modulate the efficiency of laser fuse blows'20087,250,247'Photolithographic structures using multiple anti-reflecting coatings'20077,167,156'Electrowetting display'20077,091,050'Solid phase assay for detection of ligands'20066,900,515'Use of DAR coating to modulate the efficiency of laser fuse blows'20056,664,114'Solid phase assay for detection of ligands'20036,605,502'Isolation using an antireflective coating'20036,495,450'Isolation using an antireflective coating'20026,461,950'Semiconductor processing methods, semiconductor circuitry, and gate stacks'20026,423,631'Isolation using an antireflective coating'20026,423,582'Use of DAR coating to modulate the efficiency of laser fuse blows'20026,331,379'Photo-lithography process using multiple anti-reflective coatings'20016,281,100'Semiconductor processing methods'20016,191,040'Wafer surface treatment methods and systems using electrocapillarity'20016,187,484'Irradiation mask'20016,174,590'Isolation using an antireflective coating'20016,121,133'Isolation using an antireflective coating'20006,010,964'Wafer surface treatment methods and systems using electrocapillarity'20006,008,057'Immunoassay system'19995,565,365'Assay flow apparatus and method'19965,129,414'Expansible chamber device having variably restrained valve systems'19925,111,843'Expansible chamber device having variably restrained valve systems'19924,981,068'Expansible chamber device having variably restrained valve systems'19914,909,990'Immunoassay apparatus'19904,844,869'Immunoassay apparatus'1989

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1989Based in Belmont, MA, US· patent location history
1990Patents assigned to BLOCK MYRON J (1)· patent assignee history
1990Based in Watertown, MA, US· patent location history
1991–1992Patents assigned to GLASS THOMAS R (3)· patent assignee history
1991–1992Patents assigned to HUDSON WELDON R (3)· patent assignee history
1991–1992Based in Pflugerville, TX, US· patent location history
1996–2009Based in Idaho City, ID, US· patent location history
2000–2009Patents assigned to MICRON TECHNOLOGY INC (18)· patent assignee history
2003–2006Patents assigned to SAPIDYNE INSTR INC (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MICRON TECHNOLOGY INC182000–2009
GLASS THOMAS Rself31991–1992
HUDSON WELDON R31991–1992
SAPIDYNE INSTR INC22003–2006
BLOCK MYRON J11990
Locations
LocationPatentsSpan
Idaho City, ID, US221996–2009
Pflugerville, Texas, US31991–1992
Watertown, Massachusetts, US11990
Belmont, Massachusetts, US11989