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Inventor

Paolo E. Sabella

Inventor
Pleasanton, CA, US

Overview

35→
Patents
1995–2013
Patent span
Physics
Primary field (CPC G)

Patents· 35 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Tprimary
G06TImage data processing or generation, in general47%
G06FElectric digital data processing24%
G09GArrangements or circuits for control of indicating devices using static means to present variable information18%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use10%
H04LTransmission of digital information, e.g. telegraphic communication2%
PatentTitleYear
8,547,993'Asynchronous interface for communicating between clock domains'20138,203,562'Apparatus, system, and method for distributing work to integrated heterogeneous processors'20128,108,879'Method and apparatus for context switching of multiple engines'20128,085,275'System and method for low-overhead push buffer jumps'20118,031,198'Apparatus and method for servicing multiple graphics processing channels'20117,937,606'Shadow unit for shadowing circuit status'20117,898,545'Apparatus, system, and method for integrated heterogeneous processors'20117,474,312'Memory redirect primitive for a secure graphics processing unit'20097,466,316'Apparatus, system, and method for distributing work to integrated heterogeneous processors'20087,467,289'Indicating acknowledge of stable state of pipeline resource when freeze bit set and context switch inhibited'20087,446,773'Apparatus, system, and method for integrated heterogeneous processors with integrated scheduler'20087,262,776'Incremental updating of animated displays using copy-on-write semantics'20077,190,362'System and method for organizing data for a 3-dimensional graphics pipeline'20077,095,414'Blending system and method in an integrated computer graphics pipeline'20067,064,763'Single semiconductor graphics platform'20067,050,055'Single semiconductor graphics platform with blending and fog capabilities'20067,034,829'Masking system and method for a graphics processing framework embodied on a single semiconductor platform'20067,009,607'Method, apparatus and article of manufacture for a transform module in a graphics processor'20067,002,577'Clipping system and method for a single graphics semiconductor platform'20066,992,667'Single semiconductor graphics platform system and method with skinning, swizzling and masking capabilities'20066,911,984'Desktop compositor using copy-on-write semantics'20056,911,983'Double-buffering of pixel data using copy-on-write semantics'20056,894,689'Occlusion culling method and apparatus for graphics systems'20056,867,780'System, method and article of manufacture for allowing direct memory access to graphics vertex data while bypassing a processor'20056,734,874'Graphics processing unit with transform module capable of handling scalars and vectors'20046,650,331'System, method and computer program product for performing a scissor operation in a graphics processing framework embodied on a single semiconductor platform'20036,646,639'Modified method and apparatus for improved occlusion culling in graphics systems'20036,577,309'System and method for a graphics processing framework embodied utilizing a single semiconductor platform'20036,529,207'Identifying silhouette edges of objects to apply anti-aliasing'20036,462,737'Clipping system and method for a graphics processing framework embodied on a single semiconductor platform'20026,342,888'Graphics processing unit with an integrated fog and blending operation'20026,297,833'Bump mapping in a computer graphics pipeline'20016,198,488'Transform, lighting and rasterization system embodied on a single semiconductor platform'20016,115,050'Object-based anti-aliasing'20005,430,465'Apparatus and method for managing the assignment of display attribute identification values and multiple hardware color look-up tables'1995

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1995–2009Based in Pleasanton, CA, US· patent location history
2000–2003Patents assigned to WEBTV NETWORKS INC (2)· patent assignee history
2001–2013Patents assigned to NVIDIA CORP (31)· patent assignee history
2005Based in Dublin, CA, US· patent location history
2007–2013Based in San Francisco, CA, US· patent location history
2011–2013Patents assigned to SABELLA PAOLO E (4)· patent assignee history
2012–2013Patents assigned to GARLICK LINCOLN G (2)· patent assignee history
2012–2013Patents assigned to MA DENNIS K (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
NVIDIA CORP312001–2013
SABELLA PAOLO Eself42011–2013
GARLICK LINCOLN G22012–2013
MA DENNIS K22012–2013
WEBTV NETWORKS INC22000–2003
Locations
LocationPatentsSpan
Pleasanton, California, US221995–2009
San Francisco, California, US112007–2013
Dublin, California, US22005