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Inventor

Garrett Drown

Inventor
Chandler, AZ, US

Overview

2→
Patents
2018–2020
Patent span
Physics
Primary field (CPC G)

Patents· 2 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
10,853,283Integrated circuits for generating input/output latency performance metrics using real-time clock (RTC) read measurement module202010,102,000Apparatus and method for non-serializing split locks2018

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2018–2020Patents assigned to INTEL CORP (2)· patent assignee history
2018Patents assigned to COLEMAN JAMES A (1)· patent assignee history
2018Patents assigned to DROWN GARRETT (1)· patent assignee history
2018–2020Based in Chandler, AZ, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP22018–2020
COLEMAN JAMES A12018
DROWN GARRETTself12018
Locations
LocationPatentsSpan
Chandler, AZ, US22018–2020