Inventor
Yunsang Kim
Inventor
Monte Sereno, CA, US
Overview
Patents· 58 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1035%
H01JElectric discharge tubes or discharge lamps23%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H01LSemiconductor devices10%
C23CCoating metallic material4%
H05HPlasma technique3%
H10DInorganic electric semiconductor devices3%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
B08BCleaning in general2%
B44CProducing decorative effects1%
PatentTitleYear
10,832,923Lower plasma-exclusion-zone rings for a bevel etcher202010,811,282Upper plasma-exclusion-zone rings for a bevel etcher202010,770,297Method to form ultrashallow junctions using atomic layer deposition and annealing202010,748,747Edge exclusion control with adjustable plasma exclusion zone ring202010,714,345Plasma assisted doping on germanium202010,629,458Control of bevel etch film profile using plasma exclusion zone rings larger than the wafer diameter202010,522,354Antimony co-doping with phosphorus to form ultrashallow junctions using atomic layer deposition and annealing201910,431,462Plasma assisted doping on germanium201910,224,212Isotropic etching of film with atomic layer control201910,217,610Arrangements for manipulating plasma confinement within a plasma processing system and methods thereof201910,068,981Rare earth metal surface-activated plasma doping on semiconductor substrates20189,881,788'Back side deposition apparatus and applications'20189,564,308'Methods for processing bevel edge etching'20179,543,150'Systems and methods for forming ultra-shallow junctions'20179,281,166'Plasma processing chamber for bevel edge processing'20169,275,838'Arrangements for manipulating plasma confinement within a plasma processing system and methods thereof'20169,184,043'Edge electrodes with dielectric covers'20159,053,925'Configurable bevel etcher'20158,852,384'Method and apparatus for detecting plasma unconfinement'20148,673,111'Plasma processing chamber for bevel edge processing'20148,562,750'Method and apparatus for processing bevel edge'20138,501,283'Methods for depositing bevel protective film'20138,500,951'Low-K damage avoidance during bevel etch processing'20138,440,051'Plasma processing chamber for bevel edge processing'20138,430,970'Methods for preventing corrosion of plasma-exposed yttria-coated constituents'20138,414,790'Bevel plasma treatment to enhance wet edge clean'20138,398,778'Control of bevel etch film profile using plasma exclusion zone rings larger than the wafer diameter'20138,349,202'Methods for controlling bevel edge etching in a plasma chamber'20138,323,523'High pressure bevel etch process'20128,308,896'Methods to remove films on bevel edge and backside of wafer and apparatus thereof'20128,298,433'Methods for removing an edge polymer from a substrate'20128,268,116'Methods of and apparatus for protecting a region of process exclusion adjacent to a region of process performance in a process chamber'20128,262,923'High pressure bevel etch process'20128,257,503'Method and apparatus for detecting plasma unconfinement'20128,211,238'System, method and apparatus for self-cleaning dry etch'20128,137,501'Bevel clean device'20128,083,890'Gas modulation to control edge exclusion in a bevel edge etching plasma chamber'20117,943,007'Configurable bevel etcher'20117,909,960'Apparatus and methods to remove films on bevel edge and backside of wafer'20117,858,898'Bevel etcher with gap control'20107,718,542'Low-k damage avoidance during bevel etch processing'20107,651,585'Apparatus for the removal of an edge polymer from a substrate and methods therefor'20107,575,638'Apparatus for defining regions of process exclusion and process performance in a process chamber'20097,540,935'Plasma oxidation and removal of oxidized material'20097,435,685'Method of forming a low-K dual damascene interconnect structure'20087,316,761'Apparatus for uniformly etching a dielectric layer'20087,256,134'Selective etching of carbon-doped low-k dielectrics'20077,227,244'Integrated low k dielectrics and etch stops'20077,140,374'System, method and apparatus for self-cleaning dry etch'20067,132,369'Method of forming a low-K dual damascene interconnect structure'20067,129,167'Methods and systems for a stress-free cleaning a surface of a substrate'20066,858,153'Integrated low K dielectrics and etch stops'20056,686,293'Method of etching a trench in a silicon-containing dielectric material'20046,669,858'Integrated low k dielectrics and etch stops'20036,511,920'Optical marker layer for etch endpoint determination'20036,403,491'Etch method using a dielectric etch chamber with expanded process window'20026,340,435'Integrated low K dielectrics and etch stops'20026,326,307'Plasma pretreatment of photoresist in an oxide etch process'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2014Based in San Jose, CA, US· patent location history
2002–2008Patents assigned to APPLIED MATERIALS INC (11)· patent assignee history
2002–2007Based in Santa Clara, CA, US· patent location history
2006–2020Patents assigned to LAM RES CORP (46)· patent assignee history
2009–2020Based in Monte Sereno, CA, US· patent location history
2011–2016Patents assigned to KIM YUNSANG (19)· patent assignee history
2011–2015Patents assigned to BAILEY III ANDREW D (12)· patent assignee history
2011–2013Patents assigned to FANG TONG (5)· patent assignee history
2012–2013Based in Fremont, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LAM RES CORP | 46 | 2006–2020 |
| KIM YUNSANGself | 19 | 2011–2016 |
| BAILEY III ANDREW D | 12 | 2011–2015 |
| APPLIED MATERIALS INC | 11 | 2002–2008 |
| FANG TONG | 5 | 2011–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Monte Sereno, California, US | 35 | 2009–2020 |
| San Jose, California, US | 17 | 2001–2014 |
| Santa Clara, California, US | 4 | 2002–2007 |
| Fremont, California, US | 2 | 2012–2013 |