Inventor
Yu-Hao Hsu
Inventor
Tainan, TW
Overview
Patents· 26 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores38%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
H03KPulse technique7%
G06FElectric digital data processing5%
H04BTransmission5%
H10DInorganic electric semiconductor devices5%
G02FOptical devices or arrangements for the control of light by modification of the optical properties of the media of the elements involved therein2%
G09GArrangements or circuits for control of indicating devices using static means to present variable information2%
H01LSemiconductor devices2%
H01PWaveguides2%
PatentTitleYear
10,762,934Leakage pathway prevention in a memory storage device202010,685,686Power switch control for dual power supply202010,510,380Power switch control for dual power supply201910,503,421Configurable memory storage system201910,304,500Power switch control for dual power supply20199,898,983'Source driving device with 3 types of gate oxide layer'20189,685,224'Memory with bit line control'20179,659,603'Power management circuit for an electronic device'20179,389,786'Memory device with tracking mechanism'20169,390,816'Integrated circuit having voltage mismatch reduction'20169,368,570'Integrated circuit of driving device with different operating voltages'20169,240,233'Integrated circuit having voltage mismatch reduction'20169,111,595'Memory device with tracking wordline voltage level circuit and method'20159,007,859'Far end resistance tracking design with near end pre-charge control for faster recovery time'20158,848,467'Integrated write mux and driver systems and methods'20148,767,494'Far end resistance tracking design with near end pre-charge control for faster recovery time'20148,570,114'Defected ground structure with shielding effect'20138,098,099'Broadband high output current output stage'20127,960,838'Interconnect structure'20117,863,929'Active back-end termination circuit'20117,786,546'System-on-chip with shield rings for shielding functional blocks therein from electromagnetic interference'20107,696,086'Fabricating method of an interconnect structure'20107,656,183'Method to extract gate to source/drain and overlap capacitances and test key structure therefor'20107,170,144'System-on-chip with shield rings for shielding functional blocks therein from electromagnetic interference'20076,946,692'Interconnection utilizing diagonal routing'20056,580,544'Method and apparatus for automatically correcting a bias voltage on an optical modulator of external-modulation optical emitter'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003Based in Chiayii, TW· patent location history
2005–2011Patents assigned to UNITED MICROELECTRONICS CORP (6)· patent assignee history
2005–2013Based in Taipei, TW· patent location history
2011–2012Patents assigned to NAT UNIV TSING HUA (2)· patent assignee history
2011Based in Xinying City, TW· patent location history
2012–2014Patents assigned to HSU YU-HAO (3)· patent assignee history
2012–2020Based in Tainan, TW· patent location history
2014–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (5)· patent assignee history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (9)· patent assignee history
2016–2018Based in Hsinchu County, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 9 | 2015–2020 |
| UNITED MICROELECTRONICS CORP | 6 | 2005–2011 |
| TAIWAN SEMICONDUCTOR MFG | 5 | 2014–2016 |
| HSU YU-HAOself | 3 | 2012–2014 |
| NAT UNIV TSING HUA | 2 | 2011–2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tainan, TW | 15 | 2012–2020 |
| Taipei, TW | 7 | 2005–2013 |
| Hsinchu County, TW | 2 | 2016–2018 |
| Xinying City, TW | 1 | 2011 |
| Chiayii, TW | 1 | 2003 |