LexDanaLexDanabeta
Inventor

Jian Li

Inventor
Boise, ID, US

Overview

93→
Patents
2000–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 93 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1018%
H01LSemiconductor devices14%
H10DInorganic electric semiconductor devices7%
G11CStatic stores5%
H10BElectronic memory devices5%
LOC145%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution3%
H04MTelephonic communication2%
B82YSpecific uses or applications of nanostructures2%
PatentTitleYear
10,816,275Semiconductor device assembly with vapor chamber202010,818,681Termination structures in stacked memory arrays202010,741,468Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods202010,679,921Semiconductor device packages with direct electrical connections and related methods202010,580,746Bonding pads with thermal pathways202010,579,570Logic component switch202010,573,612Bonding pads with thermal pathways202010,551,129Semiconductor device assembly with vapor chamber202010,419,939Resource partition aggregating method and device201910,336,395Foldable electric vehicle201910,215,500Semiconductor device assembly with vapor chamber201910,170,389Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods201910,163,830Bonding pads with thermal pathways201810,163,755Methods of manufacturing stacked semiconductor die assemblies with high efficiency thermal paths201810,162,781Logic component switch201810,138,790Heat recovery device of a vehicle and an assembly having the same201810,134,655Semiconductor device packages with direct electrical connections and related methods20189,953,710Memory devices with a connecting region having a band gap lower than a band gap of a body region20189,899,293'Semiconductor device packages with improved thermal management and related methods'20189,865,438'Method and apparatus for calibrating optical path degradation useful for decoupled plasma nitridation chambers'20189,837,396Stacked semiconductor die assemblies with high efficiency thermal paths and associated methods20179,818,625'Stacked semiconductor die assemblies with thermal spacers and associated systems and methods'20179,780,079'Semiconductor die assembly and methods of forming thermal paths'20179,691,746'Methods of manufacturing stacked semiconductor die assemblies with high efficiency thermal paths'20179,640,260'Memory devices with a connecting region having a band gap lower than a band gap of a body region'20179,543,274'Semiconductor device packages with improved thermal management and related methods'20179,515,002'Bonding pads with thermal pathways'20169,443,744'Stacked semiconductor die assemblies with high efficiency thermal paths and associated methods'20169,287,240'Stacked semiconductor die assemblies with thermal spacers and associated systems and methods'20169,269,646'Semiconductor die assemblies with enhanced thermal management and semiconductor devices including same'20169,184,105'Semiconductor device packages including thermally insulating materials and methods of making and using such semiconductor packages'20159,153,520'Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods'20158,988,924'Method, system, and device for heating a phase change memory (PCM)cell'20158,927,322'Combinatorial methods for making CIGS solar cells'20158,921,823'Memory cell constructions, and methods for fabricating memory cell constructions'20148,816,494'Semiconductor device packages including thermally insulating materials and methods of making and using such semiconductor packages'20148,803,705'Traffic management system'20148,766,320'Memory devices with a connecting region having a band gap lower than a band gap of a body region'20148,735,216'Memory cell constructions, and methods for fabricating memory cell constructions'20148,574,949'Methods of building crystalline silicon solar cells for use in combinatorial screening'20138,546,273'Methods and apparatus for forming nitrogen-containing layers'20138,481,433'Methods and apparatus for forming nitrogen-containing layers'20138,477,237'Portable electronic device with adjustable camera'20138,466,003'Methods of building crystalline silicon solar cells for use in combinatorial screening'20138,457,339'Loudspeaker assembly'20138,431,961'Memory devices with a connecting region having a band gap lower than a band gap of a body region'20138,432,668'Portable electronic device'2013D0678233'Mobile phone'20138,395,137'Memory cell constructions'20138,384,615'Portable electronic device'20138,278,872'Charging device'20128,254,620'Earphone assembly and portable electronic device using the same'20128,253,374'Charger for electronic device'20128,248,275'Key coding circuit'20128,242,743'Mouse with battery chamber and battery charging circuit'20128,144,516'Dynamic pass voltage for sense operation in a memory device'20128,142,230'Earphone assembly and electronic device using the same'20128,101,906'Method and apparatus for calibrating optical path degradation useful for decoupled plasma nitridation chambers'20128,070,494'Universal connector and electronic device using the same'20118,070,521'Socket connector and electronic device using the same'20117,995,333'Sliding-type portable electronic device'20117,985,107'Battery connector and portable electronic device using same'2011D0636369'Mobile phone'2011D0635543'Mobile phone'2011D0630605'Mobile phone'2011D0630607'Mobile phone'2011D0629777'Mobile phone'2010D0629778'Mobile phone'2010D0624518'Mobile phone'2010D0620927'Bluetooth earphone'2010D0616427'Keypad'2010D0609683'Mobile phone'20107,078,788'Microelectronic substrates with integrated devices'20067,078,240'Reliable adhesion layer interface structure for polymer memory electrode and method of making same'20067,018,853'Stepped structure for a multi-rank, stacked polymer memory device and method of making same'20066,960,479'Stacked ferroelectric memory device and method of making same'20056,952,017'Low-voltage and interface damage-free polymer memory device'20056,911,891'Bistable actuation techniques, mechanisms, and applications'20056,858,862'Discrete polymer memory array and method of making same'20056,825,063'Integrated core microelectronic package'20046,798,003'Reliable adhesion layer interface structure for polymer memory electrode and method of making same'20046,756,620'Low-voltage and interface damage-free polymer memory device'20046,737,754'COF packaged semiconductor'20046,734,534'Microelectronic substrate with integrated devices'20046,624,457'Stepped structure for a multi-rank, stacked polymer memory device and method of making same'20036,586,822'Integrated core microelectronic package'20036,524,887'Embedded recess in polymer memory package and method of making same'20036,461,954'Method and an apparatus for forming an under bump metallization structure'20026,376,919'Circuit edit interconnect structure through the backside of an integrated circuit die'20026,312,830'Method and an apparatus for forming an under bump metallization structure'20016,238,954'COF packaged semiconductor'20016,159,754'Method of making a circuit edit interconnect structure through the backside of an integrated circuit die'20006,154,366'Structures and processes for fabricating moisture resistant chip-on-flex packages'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2006Patents assigned to INTEL CORP (20)· patent assignee history
2000–2012Based in Sunnyvale, CA, US· patent location history
2010–2014Patents assigned to FIH HONG KONG LTD (26)· patent assignee history
2010–2019Based in Shenzhen, CN· patent location history
2011–2014Patents assigned to SHENZHEN FUTAIHONG PREC IND CO (15)· patent assignee history
2012–2020Patents assigned to MICRON TECHNOLOGY INC (36)· patent assignee history
2012–2018Patents assigned to LI JIAN (14)· patent assignee history
2012–2020Based in Boise, ID, US· patent location history
2013–2018Based in Fremont, CA, US· patent location history
2019Based in Guangdong, CN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MICRON TECHNOLOGY INC362012–2020
FIH HONG KONG LTD262010–2014
INTEL CORP202000–2006
SHENZHEN FUTAIHONG PREC IND CO152011–2014
LI JIANself142012–2018
Locations
LocationPatentsSpan
Boise, ID, US362012–2020
Shenzhen, CN272010–2019
Sunnyvale, California, US212000–2012
Fremont, California, US62013–2018
Guangdong, CN12019