Inventor
LeeLean Shu
Inventor
Los Altos, CA, US
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores63%
G06FElectric digital data processing13%
H10BElectronic memory devices13%
H10DInorganic electric semiconductor devices13%
PatentTitleYear
10,534,836Four steps associative full adder20209,484,076'Systems and methods of double/quad data rate memory involving input latching, self-timing and/or other features'20169,431,079'Systems and methods of memory and memory operation involving input latching, self-timing and/or other features'20169,159,391'Systems and methods of double/quad data rate memory involving input latching, self-timing and/or other features'20158,693,236'Systems and methods of sectioned bit line memory arrays, including hierarchical and/or other features'20148,593,860'Systems and methods of sectioned bit line memory arrays'2013Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2013–2020Patents assigned to GSI TECHNOLOGY INC (6)· patent assignee history
2013–2014Patents assigned to LEE HSIN YOU S (2)· patent assignee history
2013–2014Patents assigned to SHU LEELEAN (2)· patent assignee history
2013–2014Patents assigned to TUNG CHENMING W (2)· patent assignee history
2013–2020Based in Los Altos, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GSI TECHNOLOGY INC | 6 | 2013–2020 |
| LEE HSIN YOU S | 2 | 2013–2014 |
| SHU LEELEANself | 2 | 2013–2014 |
| TUNG CHENMING W | 2 | 2013–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Los Altos, California, US | 6 | 2013–2020 |