Inventor
Fan Ho
Inventor
San Ramon, CA, US
Overview
Patents· 50 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores60%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
G01RMeasuring electric variables7%
H01LSemiconductor devices7%
H10DInorganic electric semiconductor devices4%
H10BElectronic memory devices3%
B82YSpecific uses or applications of nanostructures1%
H01HElectric switches1%
H01RElectrically-conductive connections1%
PatentTitleYear
11,037,652Controller to detect malfunctioning address of memory device202110,867,691Controller to detect malfunctioning address of memory device202010,770,124Memory device comprising programmable command-and-address and/or data interfaces202010,446,256Controller to detect malfunctioning address of memory device201910,192,598Memory device comprising programmable command-and-address and/or data interfaces201910,008,291Controller to detect malfunctioning address of memory device20189,853,145High-voltage semiconductor device and method of manufacturing the same20179,734,879'Memory device comprising programmable command-and-address and/or data interfaces'20179,721,735'Multi-function charger'20179,659,671'Controller to detect malfunctioning address of memory device'20179,378,849'Controller to detect malfunctioning address of memory device'20169,269,460'Controller to detect malfunctioning address of memory device'20169,129,712'Programmable memory repair scheme'20159,117,496'Memory device comprising programmable command-and-address and/or data interfaces'20158,670,283'Controller to detect malfunctioning address of memory device'20148,446,788'Programmable memory repair scheme'20137,808,092'Semiconductor device with a plurality of ground planes'20107,768,847'Programmable memory repair scheme'20107,103,815'Testing of integrated circuit devices'20066,983,404'Method and apparatus for checking the resistance of programmable elements'20066,754,866'Testing of integrated circuit devices'20046,690,611'Cancellation of redundant elements with a cancel bank'20046,686,790'Low current redundancy anti-fuse method and apparatus'20046,657,914'Configurable addressing for multiple chips in a package'20036,633,507'Cancellation of redundant elements with a cancel bank'20036,525,399'Junctionless antifuses and systems containing junctionless antifuses'20036,462,608'Low current redundancy anti-fuse apparatus'20026,456,149'Low current redundancy anti-fuse method and apparatus'20026,444,558'Methods of forming and programming junctionless antifuses'20026,365,421'Method and apparatus for storage of test results within an integrated circuit'20026,351,424'Cancellation of redundant elements with a cancel bank'20026,351,140'Low current redundancy anti-fuse method and apparatus'20026,323,536'Method and apparatus for forming a junctionless antifuse'20016,255,894'Low current redundancy anti-fuse method and apparatus'20016,194,738'Method and apparatus for storage of test results within an integrated circuit'20016,185,705'Method and apparatus for checking the resistance of programmable elements'20016,154,398'Low current redundancy anti-fuse method and apparatus'20006,154,410'Method and apparatus for reducing antifuse programming time'20006,128,240'Cancellation of redundant elements with a cancel bank'20006,069,064'Method for forming a junctionless antifuse'20006,023,431'Low current redundancy anti-fuse method and apparatus'20005,982,656'Method and apparatus for checking the resistance of programmable elements'19995,973,978'Anti-fuse programming path'19995,856,950'Cancellation of redundant elements with a cancel bank'1999RE036024'Electrostatic discharge protection circuit for semiconductor device'19995,847,987'Low currency redundancy anti-fuse method and apparatus'19985,838,625'Anti-fuse programming path'19985,706,238'Self current limiting antifuse circuit'19985,631,862'Self current limiting antifuse circuit'19975,293,057'Electrostatic discharge protection circuit for semiconductor device'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2006Patents assigned to MICRON TECHNOLOGY INC (29)· patent assignee history
1994–2004Based in Boise, ID, US· patent location history
1999–2006Based in Sunnyvale, CA, US· patent location history
2000–2021Based in San Ramon, CA, US· patent location history
2003–2006Patents assigned to INAPAC TECHNOLOGY INC (3)· patent assignee history
2010–2021Patents assigned to RAMBUS INC (16)· patent assignee history
2013Patents assigned to HO FAN (1)· patent assignee history
2013Patents assigned to ONG ADRIAN E (1)· patent assignee history
2017Based in New Taipei, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 29 | 1994–2006 |
| RAMBUS INC | 16 | 2010–2021 |
| INAPAC TECHNOLOGY INC | 3 | 2003–2006 |
| HO FANself | 1 | 2013 |
| ONG ADRIAN E | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Ramon, California, US | 20 | 2000–2021 |
| Sunnyvale, California, US | 14 | 1999–2006 |
| Boise, ID, US | 14 | 1994–2004 |
| New Taipei, TW | 2 | 2017 |