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Inventor

Hirotada Tobita

Inventor
Yokkaichi, JP

Overview

3→
Patents
2016–2019
Patent span
Electricity
Primary field (CPC H)

Patents· 3 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices21%
H10BElectronic memory devices21%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1021%
H10DInorganic electric semiconductor devices14%
PatentTitleYear
10,468,413Method for forming hydrogen-passivated semiconductor channels in a three-dimensional memory device20199,466,523'Contact hole collimation using etch-resistant walls'20169,401,275'Word line with multi-layer cap structure'2016

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2016–2019Patents assigned to SANDISK TECHNOLOGIES LLC (3)· patent assignee history
2016Patents assigned to SANDISK TECHNOLOGIES INC (2)· patent assignee history
2016–2019Based in Yokkaichi, JP· patent location history
2016Based in Mie, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SANDISK TECHNOLOGIES LLC32016–2019
SANDISK TECHNOLOGIES INC22016
Locations
LocationPatentsSpan
Yokkaichi, JP22016–2019
Mie, JP12016