Inventor
Michael B. Anderson
Inventor
Colorado Springs, CO, US
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Lprimary
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses26%
H03KPulse technique23%
H04LTransmission of digital information, e.g. telegraphic communication10%
G05FSystems for regulating electric or magnetic variables8%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes8%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner8%
H04MTelephonic communication8%
E05BLocks3%
G01RMeasuring electric variables3%
H03HImpedance networks, e.g. resonant circuits3%
PatentTitleYear
11,021,892Locking system having an electronic keeper202110,423,906Leads processing engine20199,940,592Leads processing engine20189,137,371'Leads processing engine'20158,508,211'Method and system for developing low noise bandgap references'20138,370,413'No-multiply finite impulse response (FIR) filter using phase additions'20137,920,016'Monolithic voltage reference device with internal, multi-temperature drift data and related testing procedures'20117,772,920'Low thermal hysteresis bandgap voltage reference'20107,420,359'Bandgap curvature correction and post-package trim implemented therewith'20086,285,263'Linearization method and apparatus for voltage controlled oscillator'20016,246,278'High speed single phase to dual phase clock divider'20016,243,784'Method and apparatus for providing precise circuit delays'20016,122,336'Digital clock recovery circuit with phase interpolation'20006,115,769'Method and apparatus for providing precise circuit delays'20005,987,085'Clock recovery circuit'19995,953,386'High speed clock recovery circuit using complimentary dividers'19995,920,211'Fully digital clock synthesizer'19995,864,246'Method and apparatus for doubling a clock signal using phase interpolation'19995,793,822'Bist jitter tolerance measurement technique'19985,748,050'Linearization method and apparatus for voltage controlled oscillator'19985,559,473'Multi-range voltage controlled oscillator'19965,477,198'Extendible-range voltage controlled oscillator'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1995–1996Patents assigned to AT & T GLOBAL INF SOLUTION (2)· patent assignee history
1995–1996Patents assigned to HYUNDAI ELECTRONICS AMERICA (2)· patent assignee history
1995–2013Based in Colorado Springs, CO, US· patent location history
1999–2001Patents assigned to LSI LOGIC CORP (8)· patent assignee history
2008–2013Patents assigned to LINEAR TECHN INC (4)· patent assignee history
2013Based in San Diego, CA, US· patent location history
2015–2019Patents assigned to REVAGENCY IP LLC (3)· patent assignee history
2015–2019Based in San Marcos, CA, US· patent location history
2021Based in Sioux Falls, SD, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LSI LOGIC CORP | 8 | 1999–2001 |
| LINEAR TECHN INC | 4 | 2008–2013 |
| REVAGENCY IP LLC | 3 | 2015–2019 |
| AT & T GLOBAL INF SOLUTION | 2 | 1995–1996 |
| HYUNDAI ELECTRONICS AMERICA | 2 | 1995–1996 |
Locations
| Location | Patents | Span |
|---|---|---|
| Colorado Springs, CO, US | 17 | 1995–2013 |
| San Marcos, California, US | 3 | 2015–2019 |
| Sioux Falls, SD, US | 1 | 2021 |
| San Diego, California, US | 1 | 2013 |