Inventor
Bryon S. Nordquist
Inventor
Santa Clara, CA, US
Overview
Patents· 29 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing56%
G06TImage data processing or generation, in general23%
G09GArrangements or circuits for control of indicating devices using static means to present variable information15%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%
PatentTitleYear
9,720,858'Technique for performing memory access operations via texture hardware'20179,697,006'Technique for performing memory access operations via texture hardware'20179,595,075'Load/store operations in texture hardware'20179,348,762'Technique for accessing content-addressable memory'20168,823,724'Sparse texture systems and methods'20148,429,656'Thread count throttling for efficient resource utilization'20138,407,443'Off-chip out of order memory allocation for a unified shader'20138,108,872'Thread-type-based resource allocation in a multithreaded processor'20128,095,829'Soldier-on mode to control processor error handling behavior'20128,087,029'Thread-type-based load balancing in a multithreaded processor'20118,081,184'Pixel shader program thread assembly'20118,074,224'Managing state information for a multi-threaded processor'20117,948,495'Linking texture headers and texture samplers'20117,865,894'Distributing processing tasks within a processor'20117,739,473'Off-chip memory allocation for a unified shader'20107,728,841'Coherent shader output for multiple targets'20107,594,095'Multithreaded SIMD parallel processor with launching of groups of threads'20097,593,971'Configurable state table for managing multiple versions of state information'20097,584,342'Parallel data processing systems and methods using cooperative thread arrays and SIMD instruction issue'20097,533,236'Off-chip out of order memory allocation for a unified shader'20097,533,237'Off-chip memory allocation for a unified shader'20097,522,171'On-the-fly reordering of 32-bit per component texture images in a multi-cycle data transfer'20097,492,368'Apparatus, system, and method for coalescing parallel memory requests'20097,489,315'Pixel stream assembly for raster operations'20097,477,260'On-the-fly reordering of multi-cycle data transfers'20097,447,873'Multithreaded SIMD parallel processor with loading of groups of threads'20087,404,056'Virtual copying scheme for creating multiple versions of state information'20087,404,059'Parallel copying scheme for creating multiple versions of state information'20086,980,209'Method and system for scalable, dataflow-based, programmable processing of graphics data'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2017Patents assigned to NVIDIA CORP (29)· patent assignee history
2005Based in San Jose, CA, US· patent location history
2008–2017Based in Santa Clara, CA, US· patent location history
2011–2013Patents assigned to NORDQUIST BRYON S (7)· patent assignee history
2011–2012Patents assigned to COON BRETT W (2)· patent assignee history
2011–2012Patents assigned to LINDHOLM JOHN ERIK (2)· patent assignee history
2013–2014Patents assigned to DULUK JR JEROME F (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NVIDIA CORP | 29 | 2005–2017 |
| NORDQUIST BRYON Sself | 7 | 2011–2013 |
| COON BRETT W | 2 | 2011–2012 |
| DULUK JR JEROME F | 2 | 2013–2014 |
| LINDHOLM JOHN ERIK | 2 | 2011–2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Santa Clara, California, US | 28 | 2008–2017 |
| San Jose, California, US | 1 | 2005 |