Inventor
Ronald A. Sartschev
Inventor
Dunstable, MA, US
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G01Rprimary
G01RMeasuring electric variables51%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
G11CStatic stores5%
H03KPulse technique5%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses5%
H04LTransmission of digital information, e.g. telegraphic communication5%
H01LSemiconductor devices3%
H03MCoding3%
H04BTransmission3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
9,397,670'Edge generator-based phase locked loop reference clock generator for automated test system'20169,279,857'Automated test system with edge steering'20169,244,126'Automated test system with event detection capability'20169,147,620'Edge triggered calibration'20158,289,039'Pin electronics liquid cooled multi-module for high performance, low cost automated test equipment'20127,991,046'Calibrating jitter'20117,856,578'Strobe technique for test of digital signal timing'20107,574,632'Strobe technique for time stamping a digital signal'20097,573,957'Strobe technique for recovering a clock in a digital signal'20097,560,947'Pin electronics driver'20097,508,228'Method and system for monitoring test signals for semiconductor devices'20097,323,898'Pin electronics driver'20087,256,600'Method and system for testing semiconductor devices'20077,135,881'Method and system for producing signals to test semiconductor devices'20067,102,375'Pin electronics with high voltage functionality'20067,023,366'Using a parametric measurement unit for converter testing'20066,868,047'Compact ATE with time stamp system'20056,771,061'High speed tester with narrow output pulses'20046,448,575'Temperature control structure'20026,374,379'Low-cost configuration for monitoring and controlling parametric measurement units in automatic test equipment'20026,291,981'Automatic test equipment with narrow output pulses'20016,282,682'Automatic test equipment using sigma delta modulation to create reference levels'20016,073,259'Low cost CMOS tester with high channel density'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2016Patents assigned to TERADYNE INC (23)· patent assignee history
2000–2009Based in Dunstable, MA, US· patent location history
2009–2016Based in Andover, MA, US· patent location history
2012–2016Patents assigned to SARTSCHEV RONALD A (3)· patent assignee history
2012Patents assigned to BREINLINGER KEITH (1)· patent assignee history
2015Patents assigned to KANNALL GREGORY A (1)· patent assignee history
2016Patents assigned to HUTNER MARC REUBEN (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TERADYNE INC | 23 | 2000–2016 |
| SARTSCHEV RONALD Aself | 3 | 2012–2016 |
| BREINLINGER KEITH | 1 | 2012 |
| HUTNER MARC REUBEN | 1 | 2016 |
| KANNALL GREGORY A | 1 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Dunstable, Massachusetts, US | 14 | 2000–2009 |
| Andover, Massachusetts, US | 9 | 2009–2016 |