Inventor

Elmoustapha Ould-Ahmed-Vall

Inventor

Chandler, AZ, US

Overview

2015–2020

Patent span

Physics

Primary field (CPC G)

Patents· 217 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing68%

G06TImage data processing or generation, in general10%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%

G06NComputing arrangements based on specific computational models4%

H03MCoding3%

H04NPictorial communication, e.g. television2%

G09GArrangements or circuits for control of indicating devices using static means to present variable information2%

H04LTransmission of digital information, e.g. telegraphic communication1%

G01CMeasuring distances, levels or bearings1%

G08GTraffic control systems1%

PatentTitleYear

10,877,756Systems, methods, and apparatuses for tile diagonal2020 10,877,758Collapsing of multiple nested loops, methods, and instructions2020 10,878,528Adaptive smart grid-client device computation distribution with grid guide optimization2020 10,866,786Systems and methods for performing instructions to transpose rectangular tiles2020 10,866,807Processors, methods, systems, and instructions to generate sequences of integers in numerical order that differ by a constant stride2020 10,861,216Ray tracing apparatus and method for memory access and register operations2020 10,860,315Systems, apparatuses, and methods for arithmetic recurrence2020 10,853,906Compute optimizations for low precision machine learning operations2020 10,846,918Stereoscopic rendering with compression2020 10,838,734Apparatus and method for processing structure of arrays (SoA) and array of structures (AoS) data2020 10,824,938Specialized fixed function hardware for efficient convolution2020 10,817,297Method and apparatus for vector-matrix comparison2020 10,802,826Apparatus and method for performing dual signed and unsigned multiplication of packed data elements2020 10,795,677Systems, apparatuses, and methods for multiplication, negation, and accumulation of vector packed signed values2020 10,795,680Vector friendly instruction format and execution thereof2020 10,795,676Apparatus and method for multiplication and accumulation of complex and real packed data elements2020 10,782,971Method and apparatus for vector-matrix comparison2020 10,768,896Apparatus and method for processing fractional reciprocal operations2020 10,769,748Programmable coarse grained and sparse matrix compute hardware with advanced scheduling2020 10,763,891Floating point to fixed point conversion2020 10,761,591Shutting down GPU components in response to unchanged scene detection2020 10,740,100Deinterleave strided data elements processors, methods, systems, and instructions2020 10,732,970Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset2020 10,726,514Compute optimizations for low precision machine learning operations2020 10,719,323Systems and methods for performing matrix compress and decompress instructions2020 10,719,316Apparatus and method of improved packed integer permute instruction2020 10,719,917On demand MSAA resolve during lens correction and/or other post-processing phases2020 10,719,902Thread serialization, distributed parallel programming, and runtime extensions of parallel computing platform2020 10,705,845Instructions and logic for vector bit field compression and expansion2020 10,705,839Apparatus and method for multiplying, summing, and accumulating sets of packed bytes2020 10,691,452Method and apparatus for performing a vector bit reversal and crossing2020 10,691,454Conflict mask generation2020 10,691,392Regional adjustment of render rate2020 10,684,854Apparatus and method for converting a floating-point value from half precision to single precision2020 10,678,546Methods, apparatus, instructions and logic to provide population count functionality for genome sequencing and alignment2020 10,672,175Order independent asynchronous compute and streaming for graphics2020 10,671,392Systems, apparatuses, and methods for performing delta decoding on packed data elements2020 10,664,277Systems, apparatuses and methods for dual complex by complex conjugate multiply of signed words2020 10,664,237Apparatus and method for processing reciprocal square root operations2020 10,664,270Apparatus and method for vector multiply and accumulate of unsigned doublewords2020 10,664,287Systems and methods for implementing chained tile operations2020 10,656,947Processor to perform a bit range isolation instruction2020 10,656,942Fixed point to floating point conversion2020 10,635,448Byte and nibble sort instructions that produce sorted destination register and destination index mapping2020 10,635,447Scatter reduction instruction2020 10,591,971Adaptive multi-resolution for graphics2020 10,579,380System-on-chip (SoC) to perform a bit range isolation instruction2020 10,579,379Processor to perform a bit range isolation instruction2020 10,565,283Processors, methods, systems, and instructions to generate sequences of consecutive integers in numerical order2020 10,552,154Apparatus and method for multiplication and accumulation of complex and real packed data elements2020 10,546,393Compression in machine learning and deep learning processing2020 10,545,757Instruction for determining equality of all packed data elements in a source operand2020 10,540,177Efficient zero-based decompression2020 10,540,260Dynamic instruction latency management in SIMD machines2020 10,514,923Apparatus and method for vector multiply and accumulate of signed doublewords2019 10,514,924Apparatus and method for performing dual signed and unsigned multiplication of packed data elements2019 10,509,726Instructions and logic for load-indices-and-prefetch-scatters operations2019 10,496,403Apparatus and method for left-shifting packed quadwords and extracting packed doublewords2019 10,496,407Apparatus and method for adding packed data elements with rotation and halving2019 10,489,154Apparatus and method for complex multiply and accumulate2019 10,481,910Apparatus and method for shifting quadwords and extracting packed words2019 10,474,459Apparatus and method of improved permute instructions2019 10,474,463Apparatus and method for down conversion of data types2019 10,467,006Permutating vector data scattered in a temporary destination into elements of a destination register based on a permutation factor2019 10,467,796Graphics system with additional context2019 10,467,185Apparatus and method of mask permute instructions2019 10,459,877Instruction and logic to provide vector compress and rotate functionality2019 10,460,415Contextual configuration adjuster for graphics2019 10,459,728Apparatus and method of improved insert instructions2019 10,452,394Apparatus and method for complex multiplication2019 10,445,092Method and apparatus for performing a vector permute with an index and an immediate2019 10,430,147Collaborative multi-user virtual reality2019 10,424,097Predictive viewport renderer and foveated color compressor2019 10,423,411Data element comparison processors, methods, systems, and instructions2019 10,409,614Instructions having support for floating point and integer data types in the same register2019 10,410,098Compute optimizations for neural networks2019 10,409,613Processing devices to perform a key value lookup instruction2019 10,402,933Adaptive smart grid-client device computation distribution with grid guide optimization2019 10,401,954Sensory enhanced augmented reality and virtual reality device2019 10,387,158Systems, apparatuses, and methods for data speculation execution2019 10,387,156Systems, apparatuses, and methods for data speculation execution2019 10,387,148Apparatus and method to reverse and permute bits in a mask register2019 10,387,149Apparatus and method to reverse and permute bits in a mask register2019 10,372,449Packed data operation mask concatenation processors, methods, systems, and instructions2019 10,372,455Hand held device to perform a bit range isolation instruction2019 10,338,920Instructions and logic for get-multiple-vector-elements operations2019 10,332,320Autonomous vehicle advanced sensing and response2019 10,324,718Packed rotate processors, methods, systems, and instructions2019 10,318,291Providing vector horizontal compare functionality within a vector register2019 10,318,298Apparatus and method for shifting quadwords and extracting packed words2019 10,304,154Coordination and increased utilization of graphics processors during inference2019 10,303,525Systems, apparatuses, and methods for data speculation execution2019 10,303,471Systems, apparatuses, and methods for performing a double blocked sum of absolute differences2019 10,296,489Method and apparatus for performing a vector bit shuffle2019 10,296,342Systems, apparatuses, and methods for cumulative summation2019 10,296,334Method and apparatus for performing a vector bit gather2019 10,289,416Systems, apparatuses, and methods for lane-based strided gather2019 10,282,204Systems, apparatuses, and methods for strided load2019 10,282,296Zeroing a cache line2019 10,255,072Architectural register replacement for instructions that use multiple architectural registers2019 10,248,488Fault tolerance and detection by replication of input data and evaluating a packed data execution result2019 10,242,496Adaptive sub-patches system, apparatus and method2019 10,242,423Compute optimizations for low precision machine learning operations2019 10,241,792Vector frequency expand instruction2019 10,242,494Conditional shader for graphics2019 10,230,817Scheduling highly parallel applications2019 10,222,219Technologies for route navigation sharing in a community cloud2019 10,223,773On demand MSAA resolve during lens correction and/or other post-processing phases2019 10,223,112Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset2019 10,224,954Floating point to fixed point conversion2019 10,223,120Methods, apparatus, instructions and logic to provide population count functionality for genome sequencing and alignment2019 10,223,114Fixed point to floating point conversion2019 10,223,111Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset2019 10,209,988Apparatus and method to reverse and permute bits in a mask register2019 10,204,393Pre-pass surface analysis to achieve adaptive anti-aliasing modes2019 10,203,955Methods, apparatus, instructions and logic to provide vector packed tuple cross-comparison functionality2019 10,203,954Instruction and logic to provide conversions between a mask register and a general purpose register or memory2019 10,191,749Scatter reduction instruction2019 10,191,740Deinterleave strided data elements processors, methods, systems, and instructions2019 10,186,011Programmable coarse grained and sparse matrix compute hardware with advanced scheduling2019 10,185,562Conflict mask generation2019 10,152,632Dynamic brightness and resolution control in virtual environments2018 10,152,321Instructions and logic for blend and permute operation sequences2018 10,120,680Systems, apparatuses, and methods for arithmetic recurrence2018 10,114,642Instruction and logic for detecting the floating point cancellation effect2018 10,108,418Collapsing of multiple nested loops, methods, and instructions2018 10,089,110Systems, apparatuses, and methods for cumulative product2018 10,083,316Instruction execution that broadcasts and masks data values at different levels of granularity2018 10,083,032System, apparatus and method for generating a loop alignment count or a loop alignment mask2018 10,061,583Systems, apparatuses, and methods for data speculation execution2018 10,061,589Systems, apparatuses, and methods for data speculation execution2018 10,049,057Instruction and logic for secure instruction execution pipeline2018 10,037,208Multi-element instruction with different read and write masks2018 10,037,209Systems, apparatuses, and methods for performing delta decoding on packed data elements2018 10,025,591Instruction for element offset calculation in a multi-dimensional array2018 10,019,262Vector store/load instructions for array of structures2018 10,013,253Method and apparatus for performing a vector bit reversal2018 10,007,519Instructions and logic for vector bit field compression and expansion2018 9,996,320Fused multiply-add (FMA) low functional unit2018 9,996,319Floating point (FP) add low instructions functional unit2018 9,996,361Byte and nibble sort instructions that produce sorted destination register and destination index mapping2018 9,983,873Systems, apparatuses, and methods for performing mask bit compression2018 9,965,282Systems, apparatuses, and methods for performing delta encoding on packed data elements2018 9,946,540Apparatus and method of improved permute instructions with multiple granularities2018 9,946,541Systems, apparatuses, and method for strided access2018 9,928,063'Instruction and logic to provide vector horizontal majority voting functionality'2018 9,921,840'Sytems, apparatuses, and methods for performing a conversion of a writemask register to a list of index values in a vector register'2018 9,904,548'Instruction and logic to perform a centrifuge operation'2018 9,904,547'Packed data rearrangement control indexes generation processors, methods, systems and instructions'2018 9,898,283'Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset'2018 9,898,284'Apparatus and method for an instruction that determines whether a value is within a range'2018 9,891,913'Method and apparatus for performing conflict detection using vector comparison operations'2018 9,870,338'Systems, apparatuses, and methods for performing vector packed compression and repeat'2018 9,864,602'Packed rotate processors, methods, systems, and instructions'2018 9,830,151Method and apparatus for vector index load and store2017 9,811,464'Apparatus and method for considering spatial locality in loading data elements for execution'2017 9,804,844'Instruction and logic to provide stride-based vector load-op functionality with mask duplication'2017 9,792,119'Instruction and logic to provide vector horizontal majority voting functionality'2017 9,791,282'Technologies for route navigation sharing in a community cloud'2017 9,785,437'Method and apparatus for performing a vector bit reversal and crossing'2017 9,785,442'Systems, apparatuses, and methods for data speculation execution'2017 9,772,850'Morton coordinate adjustment processors, methods, systems, and instructions'2017 9,772,848'Three-dimensional morton coordinate conversion processors, methods, systems, and instructions'2017 9,772,849'Four-dimensional morton coordinate conversion processors, methods, systems, and instructions'2017 9,760,371'Packed data operation mask register arithmetic combination processors, methods, systems, and instructions'2017 9,747,101'Gather-op instruction to duplicate a mask and perform an operation on vector elements gathered via tracked offset-based gathering'2017 9,696,993'Instructions and logic to vectorize conditional loops'2017 9,684,510'Systems, apparatuses, and methods for performing a shuffle and operation (Shuffle-Op)'2017 9,678,751'Systems, apparatuses, and methods for performing a horizontal partial sum in response to a single instruction'2017 9,672,036'Instruction and logic to provide vector loads with strides and masking functionality'2017 9,665,371'Providing vector horizontal compare functionality within a vector register'2017 9,658,850'Apparatus and method of improved permute instructions'2017 9,645,820'Apparatus and method to reserve and permute bits in a mask register'2017 9,639,354'Packed data rearrangement control indexes precursors generation processors, methods, systems, and instructions'2017 9,632,980'Apparatus and method of mask permute instructions'2017 9,619,229'Collapsing of multiple nested loops, methods and instructions'2017 9,619,226'Systems, apparatuses, and methods for performing a horizontal add or subtract in response to a single instruction'2017 9,619,236'Apparatus and method of improved insert instructions'2017 9,606,961'Instruction and logic to provide vector compress and rotate functionality'2017 9,600,285'Packed data operation mask concatenation processors, methods, systems and instructions'2017 9,588,764'Apparatus and method of improved extract instructions'2017 9,582,464'Systems, apparatuses, and methods for performing a double blocked sum of absolute differences'2017 9,575,757'Efficient zero-based decompression'2017 9,557,998'Systems, apparatuses, and methods for performing delta decoding on packed data elements'2017 9,524,168'Apparatus and method for shuffling floating point or integer values'2016 9,513,917'Vector friendly instruction format and execution thereof'2016 9,513,918'Apparatus and method for performing permute operations'2016 9,513,907'Methods, apparatus, instructions and logic to provide vector population count functionality'2016 9,507,593'Instruction for element offset calculation in a multi-dimensional array'2016 9,501,276'Instructions and logic to vectorize conditional loops'2016 9,495,155'Methods, apparatus, instructions and logic to provide population count functionality for genome sequencing and alignment'2016 9,495,162'Apparatus and method for performing a permute operation'2016 9,489,196'Multi-element instruction with different read and write masks'2016 9,465,612'Systems, apparatuses, and methods for performing delta encoding on packed data elements'2016 9,459,866'Vector frequency compress instruction'2016 9,459,865'Systems, apparatuses, and methods for performing a butterfly horizontal and cross add or substract in response to a single instruction'2016 9,454,507'Systems, apparatuses, and methods for performing a conversion of a writemask register to a list of index values in a vector register'2016 9,448,794'Instruction and logic to provide vector horizontal majority voting functionality'2016 9,448,795'Limited range vector memory access instructions, processors, methods, and systems'2016 9,442,731'Packed two source inter-element shift merge processors, methods, systems, and instructions'2016 9,442,733'Packed data operation mask comparison processors, methods, systems, and instructions'2016 9,424,327'Instruction execution that broadcasts and masks data values at different levels of granularity'2016 9,411,584'Methods, apparatus, instructions, and logic to provide vector address conflict detection functionality'2016 9,411,592'Vector address conflict resolution with vector population count functionality'2016 9,411,583'Vector instruction for presenting complex conjugates of respective complex numbers'2016 9,411,586'Apparatus and method for an instruction that determines whether a value is within a range'2016 9,405,539'Providing vector sub-byte decompression functionality'2016 9,389,861'Systems, apparatuses, and methods for mapping a source operand to a different range'2016 9,378,017'Apparatus and method of efficient vector roll operation'2016 9,354,877'Systems, apparatuses, and methods for performing mask bit compression'2016 9,336,000'Instruction execution unit that broadcasts data values at different levels of granularity'2016 9,244,687'Packed data operation mask comparison processors, methods, systems, and instructions'2016 9,244,684'Limited range vector memory access instructions, processors, methods, and systems'2016 9,218,182'Systems, apparatuses, and methods for performing a shuffle and operation (shuffle-op)'2015 9,207,941'Systems, apparatuses, and methods for reducing the number of short integer multiplications'2015 9,207,942'Systems, apparatuses,and methods for zeroing of bits in a data element'2015 8,996,923'Apparatus and method to obtain information regarding suppressed faults'2015

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2015–2020Patents assigned to INTEL CORP (213)· patent assignee history

2015–2018Patents assigned to OULD-AHMED-VALL ELMOUSTAPHA (40)· patent assignee history

2015–2020Patents assigned to VALENTINE ROBERT (28)· patent assignee history

2015–2020Based in Chandler, AZ, US· patent location history

2016–2019Patents assigned to TOLL BRET L (17)· patent assignee history

2016–2020Patents assigned to GRADSTEIN AMIT (16)· patent assignee history

2016–2020Based in Phoenix, AZ, US· patent location history

2019Based in Chanfler, AZ, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	213	2015–2020
OULD-AHMED-VALL ELMOUSTAPHAself	40	2015–2018
VALENTINE ROBERT	28	2015–2020
TOLL BRET L	17	2016–2019
GRADSTEIN AMIT	16	2016–2020

Locations

Location	Patents	Span
Chandler, AZ, US	203	2015–2020
Phoenix, AZ, US	13	2016–2020
Chanfler, AZ, US	1	2019