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Inventor

Masaru Koyanagi

Inventor
Tokyo, JP

Overview

113→
Patents
1981–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 113 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores35%
H03KPulse technique13%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1012%
H01LSemiconductor devices10%
G06FElectric digital data processing7%
H10BElectronic memory devices6%
H10DInorganic electric semiconductor devices4%
G05FSystems for regulating electric or magnetic variables3%
H03FAmplifiers2%
G01RMeasuring electric variables1%
PatentTitleYear
11,004,521Semiconductor device and semiconductor memory device202110,985,141Semiconductor device having stacked chips202110,964,671Stacked chips comprising interconnects202110,847,232Semiconductor memory device202010,811,393Memory device202010,790,266Memory device with a plurality of stacked memory core chips202010,784,866Semiconductor device202010,734,360Semiconductor device202010,679,710Semiconductor device202010,622,074Semiconductor storage device202010,593,649Semiconductor device202010,541,231Semiconductor device having stacked chips202010,530,350Correction circuit202010,482,977Semiconductor memory device201910,461,750Semiconductor device201910,452,588Semiconductor device201910,438,929Semiconductor device201910,359,961Storage device201910,360,982Semiconductor memory device2019RE047355Non-volatile semiconductor storage device201910,186,487Semiconductor device201910,157,894Semiconductor device having stacked chips201810,089,257Semiconductor storage device and control method thereof20189,977,752Semiconductor storage device and control method thereof20189,853,013Semiconductor device having stacked chips20179,792,983'Nonvolatile semiconductor memory device and memory system'20179,773,527'Semiconductor device'2017RE046526'Non-volatile semiconductor storage device'20179,679,617'Amplifier'20179,659,652'Semiconductor storage device and control method thereof'20179,634,629'Semiconductor amplifier circuit'20179,633,980'Semiconductor device'20179,589,946'Chip with a bump connected to a plurality of wirings'20179,571,101'Semiconductor device'20179,431,078'Semiconductor storage device and control method thereof'20169,431,322'Semiconductor device having stacked chips'20169,401,324'Semiconductor device having an on die termination circuit'20169,251,905'Semiconductor integrated circuit including a voltage boosting or lowering circuit'20169,230,671'Output circuit and semiconductor storage device'20168,988,138'Semiconductor device'20158,928,399'Semiconductor device having stacked chips'2015RE045307'Non-volatile semiconductor storage device'20148,879,335'Input circuit'20148,872,562'Semiconductor device'20148,861,287'Interface circuit'20148,736,346'Level shift circuit'20148,736,311'Semiconductor integrated circuit'20148,558,602'Semiconductor integrated circuit'20138,405,432'Output buffer circuit, input buffer circuit, and input/output buffer circuit'20138,405,428'Semiconductor integrated circuit'20138,274,845'Nonvolatile semiconductor memory device'20128,258,817'Semiconductor integrated circuit'20128,242,812'Buffer circuit'20127,911,844'Non-volatile semiconductor storage device'20117,843,089'Semiconductor device'20107,683,491'Semiconductor device'20107,359,255'Semiconductor device having auto trimming function for automatically adjusting voltage'20087,206,242'Semiconductor memory'20077,133,303'Dynamic type semiconductor memory apparatus'20067,042,790'Semiconductor device, sales method for semiconductor device, sales system for semiconductor device and program product storing sales program for semiconductor device'20067,027,335'Semiconductor storage device'20066,839,806'Cache system with a cache tag memory and a cache tag buffer'20056,801,144'Semiconductor memory device inputting/outputting data synchronously with clock signal'20046,762,968'Semiconductor memory device having a small-sized memory chip and a decreased power-supply noise'20046,714,615'MOS-type semiconductor integrated circuit'20046,700,411'MOS-type semiconductor integrated circuit'20046,665,226'Semiconductor integrated circuit device and method of manufacturing thereof'20036,657,531'Fuse circuit using capacitors as fuse elements'20036,617,622'Pad layout and lead layout in semiconductor device having a center circuit'20036,606,688'Cache control method and cache controller'20036,577,551'Semiconductor integrated circuit having a built-in data storage circuit for nonvolatile storage of control data'20036,563,351'Semiconductor integrated circuit having output buffer'20036,519,198'Semiconductor memory device'20036,510,087'Semiconductor memory device'20036,498,741'Semiconductor memory device'20026,496,442'Dynamic random access memory device and semiconductor integrated circuit device'20026,490,219'Semiconductor integrated circuit device and method of manufacturing thereof'20026,480,034'MOS-type semiconductor integrated circuit'20026,466,490'Semiconductor memory circuit'20026,370,077'Dynamic random access memory device and semiconductor integrated circuit device'20026,349,069'Semiconductor memory device'20026,303,948'Pad layout and lead layout in semiconductor device'20016,272,063'Semiconductor memory device'20016,198,649'Semiconductor memory device'20016,069,835'Semiconductor memory device'20005,990,729'Semiconductor integrated circuit having first and second voltage step down circuits'19995,955,891'Semiconductor integrated circuit device with output circuit'19995,905,292'Semiconductor device in which an increase in threshold voltage, resulting from back-gate bias effect is mitigated, and method of manufacturing the same'19995,880,624'Constant potential generating circuit and semiconductor device using same'19995,848,011'Semiconductor memory device'19985,841,175'Semiconductor device in which an increase in threshold voltage, resulting from back-gate bias effect is mitigated, and method of manufacturing the same'19985,674,763'Method of manufacturing a semiconductor device'19975,659,512'Semiconductor integrated circuit applicable to data read circuit from memory'19975,640,355'Semiconductor memory device'19975,627,493'Semiconductor device having supply voltage deboosting circuit'19975,570,038'Semiconductor integrated circuit device with data output circuit'19965,570,047'Semiconductor integrated circuit with sense amplifier control circuit'19965,491,430'Semiconductor integrated circuit device with data output circuit'19965,402,018'Semiconductor integrated circuit'19955,391,918'Semiconductor device'19955,357,193'Semiconductor memory having a voltage stress applying circuit'19945,347,145'Pad arrangement for a semiconductor device'19945,341,013'Semiconductor device provided with sense circuits'19945,319,256'Semiconductor device for generating constant potential'19945,282,167'Dynamic random access memory'19945,270,971'Semiconductor memory having a plurality of sense amplifier circuits and corresponding bit lines'19935,255,229'Dynamic random access memory including stress test circuitry'19935,202,588'Substrate bias circuit'19935,168,462'Sense amplifier having reduced coupling noise'19925,057,704'Semiconductor integrated circuit having substrate potential detecting circuit commonly used'19914,970,685'Semiconductor memory device having a divided bit line structure'19904,893,029'Power supply noise protection circuit'19904,267,427'Method of boring a hole through a magnet made of an intermetallic compound'1981

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1990–2017Patents assigned to TOSHIBA KK (83)· patent assignee history
1990–2021Based in Tokyo, JP· patent location history
1993–2007Based in Yokohama, JP· patent location history
1999–2006Based in Kanagawa, JP· patent location history
2005Based in Hadano, JP· patent location history
2012–2014Patents assigned to KOYANAGI MASARU (9)· patent assignee history
2012–2013Patents assigned to FUKUDA RYO (4)· patent assignee history
2012–2014Patents assigned to SUEMATSU YASUHIRO (3)· patent assignee history
2013–2021Based in Ota, JP· patent location history
2017–2021Patents assigned to TOSHIBA MEMORY CORP (26)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TOSHIBA KK831990–2017
TOSHIBA MEMORY CORP262017–2021
KOYANAGI MASARUself92012–2014
FUKUDA RYO42012–2013
SUEMATSU YASUHIRO32012–2014
Locations
LocationPatentsSpan
Tokyo, JP461990–2021
Yokohama, JP401993–2007
Ota, JP202013–2021
Kanagawa, JP31999–2006
Hadano, JP12005