Inventor
Alexander Michaelis
Inventor
Wappingers Falls, NY, US
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices31%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1020%
H10DInorganic electric semiconductor devices13%
C25DProcesses for the electrolytic or electrophoretic production of coatings4%
G01BMeasuring length, thickness or similar linear dimensions4%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form2%
C01GCompounds containing metals not covered by subclasses c01d or c01f2%
C04BLime, magnesia2%
PatentTitleYear
9,337,497'Layer structure and use thereof to form a ceramic layer structure between an interconnect and a cathode of a high-temperature fuel cell'20167,879,395'Method of preparing a coating solution and a corresponding use of the coating solution for coating a substrate'20117,046,363'Optical measurement system and method'20066,740,555'Semiconductor structures and manufacturing methods'20046,740,595'Etch process for recessing polysilicon in trench structures'20046,605,860'Semiconductor structures and manufacturing methods'20036,573,137'Single sided buried strap'20036,555,862'Self-aligned buried strap for vertical transistors'20036,486,024'Integrated circuit trench device with a dielectric collar stack, and method of forming thereof'20026,429,092'Collar formation by selective oxide deposition'20026,426,254'Method for expanding trenches by an anisotropic wet etch'20026,426,253'Method of forming a vertically oriented device in an integrated circuit'20026,387,771'Low temperature oxidation of conductive layers for semiconductor fabrication'20026,352,893'Low temperature self-aligned collar formation'20026,335,247'Integrated circuit vertical trench device and method of forming thereof'20026,156,606'Method of forming a trench capacitor using a rutile dielectric material'20006,103,585'Method of forming deep trench capacitors'20006,066,527'Buried strap poly etch back (BSPE) process'20006,031,614'Measurement system and method for measuring critical dimensions using ellipsometry'20005,979,244'Method and apparatus for evaluating internal film stress at high lateral resolution'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2000Patents assigned to SIEMENS AG (4)· patent assignee history
1999–2003Based in Wappingers Falls, NY, US· patent location history
2000–2003Patents assigned to INFINEON TECHNOLOGIES CORP (2)· patent assignee history
2002–2006Patents assigned to INFINEON TECHNOLOGIES AG (12)· patent assignee history
2002Based in Dormagen, DE· patent location history
2003–2004Patents assigned to IBM (4)· patent assignee history
2003–2006Based in Leverkusen, DE· patent location history
2004Based in Wolfshagen, DE· patent location history
2011–2016Based in Dresden, DE· patent location history
2016Patents assigned to BRANDNER MARCO (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 12 | 2002–2006 |
| IBM | 4 | 2003–2004 |
| SIEMENS AG | 4 | 1999–2000 |
| INFINEON TECHNOLOGIES CORP | 2 | 2000–2003 |
| BRANDNER MARCO | 1 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Wappingers Falls, New York, US | 10 | 1999–2003 |
| Dormagen, DE | 4 | 2002 |
| Leverkusen, DE | 3 | 2003–2006 |
| Dresden, DE | 2 | 2011–2016 |
| Wolfshagen, DE | 1 | 2004 |