Inventor
Jogendra C. Sarker
Inventor
Austin, TX, US
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores57%
G06FElectric digital data processing43%
PatentTitleYear
9,323,691'Multiple page size memory management unit'20169,021,194'Memory management unit tag memory'20158,611,162'Circuit for preventing a dummy read in a memory'20138,099,580'Translation look-aside buffer with a tag memory and method therefor'20127,193,924'Dual-port static random access memory having improved cell stability and write margin'20077,161,827'SRAM having improved cell stability and method therefor'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007–2016Patents assigned to FREESCALE SEMICONDUCTOR INC (6)· patent assignee history
2007–2016Based in Austin, TX, US· patent location history
2012–2016Patents assigned to SARKER JOGENDRA C (4)· patent assignee history
2012–2016Patents assigned to RAMARAJU RAVINDRARAJ (3)· patent assignee history
2015Patents assigned to BEARDEN DAVID R (1)· patent assignee history
2016Patents assigned to FIENE ERIC V (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FREESCALE SEMICONDUCTOR INC | 6 | 2007–2016 |
| SARKER JOGENDRA Cself | 4 | 2012–2016 |
| RAMARAJU RAVINDRARAJ | 3 | 2012–2016 |
| BEARDEN DAVID R | 1 | 2015 |
| FIENE ERIC V | 1 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 6 | 2007–2016 |