Inventor
LI-TE LIN
Inventor
TW
Overview
Patents· 81 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices28%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
H10DInorganic electric semiconductor devices23%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1012%
B82YSpecific uses or applications of nanostructures7%
H01JElectric discharge tubes or discharge lamps3%
B23KSoldering or unsoldering1%
C23CCoating metallic material1%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests0%
PatentTitleYear
12,598,937Epitaxial formation with treatment and semiconductor devices resulting therefrom202612,575,156Reducing pattern loading in the etch-back of metal gate202612,520,558High selectivity etching with germanium-containing gases202612,513,952Method for fabricating a semiconductor device including etching nanostructures202512,501,670Isolation structure for semiconductor device202512,471,344Dry etching of semiconductor structures with fluorine-containing gases202512,396,205Semiconductor device having fins and method of fabricating the same202512,396,245Semiconductor arrangement and method for making202512,389,619Semiconductor device structure with inner spacer layer202512,376,337Air inner spacers202512,356,646Semiconductor device and method for manufacturing the same202512,336,252Inner spacer formation in multi-gate transistors202512,334,342Pattern fidelity enhancement202512,310,043Method of fabricating a semiconductor device202512,310,097Dielectric protection layer in middle-of-line interconnect structure manufacturing method202512,288,722Spacer structure for semiconductor device and method for forming the same202512,261,085Semiconductor device with reduced loading effect202512,255,074Selective etching method and semiconductor structure manufactured using the same202512,230,507Method of manufacturing semiconductor devices using directional process202512,224,210Method for FinFet fabrication and structure thereof202512,217,961Hard mask trimming in method for manufacturing semiconductor device202512,218,219Spacer structure for semiconductor device202512,198,939Technique for semiconductor manufacturing202512,183,805Semiconductor device and manufacturing method thereof202412,154,969Semiconductor device structure with metal gate stack202412,154,970Method for semiconductor device structure202412,125,897Air spacers in transistors and methods forming same202412,094,951Capping structures in semiconductor devices202412,087,558Ion beam etching apparatus and method202412,046,676Semiconductor devices and methods of manufacturing thereof202412,033,863Semiconductor fabrication system embedded with effective baking module202412,034,059Reducing pattern loading in the etch-back of metal gate202412,027,625Semiconductor device having fins and method of fabricating the same202412,021,125High selectivity etching with germanium-containing gases202412,014,954Method and equipment for forming gaps in a material layer202412,002,663Processing apparatus and method for forming semiconductor structure202411,978,672Semiconductor device with elongated pattern202411,973,129Semiconductor device structure with inner spacer layer and method for forming the same202411,942,372Dielectric protection layer in middle-of-line interconnect structure manufacturing method202411,942,367Semiconductor device and method of manufacture202411,929,424Semiconductor device and method for forming the same202411,908,701Patterning method and manufacturing method of semiconductor device202411,908,685Methods of reducing gate spacer loss during semiconductor manufacturing202411,901,190Method of patterning202411,881,401Method of forming metal features202411,862,465Fine line patterning methods202411,855,192Semiconductor device and manufacturing method thereof202311,843,041Gate etch back with reduced loading effect202311,830,928Inner spacer formation in multi-gate transistors202311,791,161Pattern fidelity enhancement202311,776,850Semiconductor device with reduced loading effect202311,769,822Semiconductor device and method for manufacturing the same202311,728,221Air spacers in transistors and methods forming same202311,707,803Apparatus and method for directional etch with micron zone beam and angle control202311,652,152Capping structures in semiconductor devices202311,651,972Method of manufacturing semiconductor devices using directional process202311,646,234Method for FinFET fabrication and structure thereof202311,626,506Reducing pattern loading in the etch-back of metal gate202311,605,728Semiconductor device structure with inner spacer layer202311,581,222Via in semiconductor device structure202311,551,966Method of forming semiconductor structure having layer with re-entrant profile202311,545,397Spacer structure for semiconductor device and method for forming the same202311,522,065Gate etch back with reduced loading effect202211,515,423Semiconductor device having fins202211,469,143Semiconductor device with elongated pattern202211,424,341Semiconductor device202211,417,751Semiconductor device structure and method for forming the same202211,373,878Technique for semiconductor manufacturing202211,351,635Apparatus and method for directional etch with micron zone beam and angle control202211,264,281Semiconductor device with reduced loading effect202211,244,856Method and equipment for forming gaps in a material layer202211,239,078Fine line patterning methods202211,222,794Semiconductor fabrication system embedded with effective baking module202211,217,487Semiconductor arrangement and method of manufacture202211,205,700Air gap spacer and related methods202111,201,243Nanowire stack GAA device and methods for producing the same202111,201,229Structure and formation method of semiconductor device with metal gate stack202111,195,759Semiconductor arrangement and method for making202111,183,580Structure and formation method of semiconductor device with metal gate stack202111,152,491Method for forming semiconductor device structure with inner spacer layer202111,145,749Method of fabricating a semiconductor device2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (81)· patent assignee history
2021–2026Based in TW· patent location history
2023Patents assigned to TSMC NANJING COMPANY LTD (1)· patent assignee history
2025Patents assigned to TAIWAN SEMICONDUCOR MFG COMPANY LTD (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 81 | 2021–2026 |
| TAIWAN SEMICONDUCOR MFG COMPANY LTD | 1 | 2025 |
| TSMC NANJING COMPANY LTD | 1 | 2023 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 81 | 2021–2026 |