Inventor
ZHIQIANG WU
Inventor
TW
Overview
Patents· 102 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices22%
H01LSemiconductor devices21%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
H10BElectronic memory devices9%
B82YSpecific uses or applications of nanostructures8%
G11CStatic stores6%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
H04LTransmission of digital information, e.g. telegraphic communication3%
H10NElectric solid-state devices not otherwise provided for3%
H04NPictorial communication, e.g. television2%
PatentTitleYear
12,581,690Method of forming semiconductor device with implanted nanosheets202612,581,866Memory device and method for fabricating the same202612,568,640Multi-gate devices with multi-layer inner spacers and fabrication methods thereof2026D1116212Ground insert lamp202612,546,464Flexibly removable eaves lamp202612,501,660Field effect transistor with merged epitaxy backside cut and method2025D1106543Recessed light2025D1100749Sliding frame202512,432,954Semiconductor device structure with fin and method for forming the same202512,414,511Water sprinkler202512,396,240Source/drain silicide for multigate device performance and method of fabricating thereof202512,382,691Effective work function tuning via silicide induced interface dipole modulation for metal gates202512,376,309Ferroelectric memory device and method of forming the same2025D1085489Downlight2025D1085501Downlight202512,363,908Semiconductor memory devices with varying channel width and methods of manufacturing thereof202512,349,418Semiconductor device and manufacturing method thereof202512,349,380Gate all around transistor device and fabrication methods thereof202512,317,526Multi-gate devices and fabricating the same with etch rate modulation202512,310,029Semiconductor memory device and manufacturing method thereof202512,300,754Channel configurations with stacked segments for gate-all-around based devices and methods of fabrication thereof202512,302,640Integrated circuit structure and method with hybrid orientation for FinFET202512,300,721Semiconductor device structure with channel and method for forming the same202512,300,749Source/drain features with improved strain properties202512,272,043Semiconductor topography simulation of non-removal type processes202512,256,551Method for forming semiconductor memory structure202512,237,414Source/drain features with improved strain properties202512,218,214Source/drain silicide for multigate device performance and method of fabricating thereof202512,217,782Current steering in reading magnetic tunnel junction202512,199,170Method of manufacturing a multi-gate device having a semiconductor seed layer embedded in an isolation layer202512,190,931Semiconductor memory devices and methods of manufacturing thereof202512,174,545System and method for performing extreme ultraviolet photolithography processes202412,166,089Method of manufacturing semiconductor device and associated memory device202412,142,685FinFET device with high-K metal gate stack202412,118,707System and method for semiconductor topography simulations202412,107,054Semiconductor package, semiconductor device and shielding housing of semiconductor package2024D1043443Trailer landing leg2024D1043009Base station for cleaning robot202412,096,544Lithography thermal control202412,087,714Reduction of cracks in passivation layer202412,068,374Method of dopant deactivation underneath gate202412,040,222Air-replaced spacer for self-aligned contact scheme202412,029,0423D memory device with modulated doped channel2024D1030460Caster202412,009,408Multi-gate devices having a semiconductor layer between an inner spacer and an epitaxial feature202411,990,522Effective work function tuning via silicide induced interface dipole modulation for metal gates202411,955,554Method of fabricating a multi-gate device202411,949,001Multi-gate devices and fabricating the same with etch rate modulation202411,942,134Memory circuit and write method202411,929,409Semiconductor device with improved source and drain contact area and methods of fabrication thereof202411,908,919Multi-gate devices with multi-layer inner spacers and fabrication methods thereof202411,889,674Structure and method for SRAM FinFET device having an oxide feature202411,862,218Read circuit for magnetic tunnel junction (MTJ) memory202411,855,143Semiconductor structures and methods thereof202311,849,589Semiconductor structure and manufacturing method thereof202311,843,032Semiconductor device structure with channel and method for forming the same202311,768,437System and method for performing extreme ultraviolet photolithography processes202311,769,804Method of manufacturing semiconductor device and associated memory device202311,758,734Semiconductor memory devices and methods of manufacturing thereof202311,735,650Structure and method for FinFET device with buried sige oxide202311,735,594Integrated circuit structure and method with hybrid orientation for FinFET202311,716,857Semiconductor memory device and manufacturing method thereof202311,705,177Semiconductor memory devices and methods of manufacturing thereof202311,677,572Permission-controlled smart contract upgrade method and system based on smart contract, blockchain node, and storage medium202311,676,648Current steering in reading magnetic tunnel junction202311,647,578Lithography thermal control202311,626,400Semiconductor device structure incorporating air gap202311,616,151Channel configuration for improving multigate device performance and method of fabrication thereof202311,610,848Semiconductor package, semiconductor device and shielding housing of semiconductor package202311,563,118Structure and method for SRAM FinFET device202311,557,659Gate all around transistor device and fabrication methods thereof2023D0975332Downlight202311,527,622Effective work function tuning via silicide induced interface dipole modulation for metal gates202211,508,807Semiconductor device having nanosheet transistor and methods of fabrication thereof202211,508,754Semiconductor memory structure and method for forming the same202211,508,427Memory circuit and write method202211,489,063Method of manufacturing a source/drain feature in a multi-gate semiconductor structure202211,490,173Switch of audio and video202211,476,342Semiconductor device with improved source and drain contact area and methods of fabrication thereof202211,469,332Semiconductor device and manufacturing method thereof2022D0965839Floodlight202211,463,494Balance of initial frame and limitation of traffic202211,424,268Semiconductor structure and manufacturing method thereof202211,393,926Multi-gate device202211,392,040System and method for performing extreme ultraviolet photolithography processes202211,380,783Structure and method for FinFET device with buried SiGe oxide202211,374,843Method for measuring network speed, computing device, and computer-program product202211,342,422Method of manufacturing semiconductor device and associated memory device202211,342,016Read circuit for magnetic tunnel junction (MTJ) memory202211,336,711Method of playing audio and video, computing device, and computer program product202211,327,961Action queue for hierarchy maintenance202211,309,005Current steering in reading magnetic tunnel junction202211,303,949Method of switching resolution, computing device, and computer-readable storage medium202211,301,233Permission-controlled smart contract upgrade method based on smart contract202211,289,494Structure and method for SRAM FinFET device having an oxide feature202211,282,943Multi-gate devices and fabricating the same with etch rate modulation202211,284,126Method and system for streaming media live broadcast202211,264,270Air-replaced spacer for self-aligned contact scheme202211,158,637Method and structure for FinFET device202111,145,553Nonplanar device and strain-generating channel dielectric202111,145,762Multi-gate device202111,139,341Protection of MRAM from external magnetic field using magnetic-field-shielding structure2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (81)· patent assignee history
2021–2026Based in TW· patent location history
2022–2026Patents assigned to SHENZHEN LINGKE TECH CO LTD (8)· patent assignee history
2022Patents assigned to SHANGHAI BILIBILI TECH CO LTD (5)· patent assignee history
2022–2023Patents assigned to HANGZHOU QULIAN TECH CO LTD (2)· patent assignee history
2022–2026Based in CN· patent location history
2024–2025Patents assigned to GUANGDONG FUWA HEAVY IND CO (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 81 | 2021–2026 |
| SHENZHEN LINGKE TECH CO LTD | 8 | 2022–2026 |
| SHANGHAI BILIBILI TECH CO LTD | 5 | 2022 |
| GUANGDONG FUWA HEAVY IND CO | 2 | 2024–2025 |
| HANGZHOU QULIAN TECH CO LTD | 2 | 2022–2023 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 81 | 2021–2026 |
| CN | 21 | 2022–2026 |