Inventor
Kuo-Hua Lee
Inventor
Lower Macungie Township, Lehigh County, PA, US
Overview
Patents· 48 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
H10DInorganic electric semiconductor devices23%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests17%
H10BElectronic memory devices11%
G11CStatic stores3%
G01NInvestigating or analysing materials by determining their chemical or physical properties1%
G01RMeasuring electric variables1%
Y10TTechnical subjects covered by former us classification1%
PatentTitleYear
8,833,136'Rotary-drum hydraulic-impact abrasion testing machine'20148,201,035'Testing system and method thereof'20127,940,588'Chip testing circuit'20116,384,446'Grooved capacitor structure for integrated circuits'20026,291,883'Static random-access memory device having a local interconnect structure'20016,255,688'Capacitor having aluminum alloy bottom plate'20016,001,701'Process for making bipolar having graded or modulated collector'19995,956,618'Process for producing multi-level metallization in an integrated circuit'19995,945,355'Integrated circuit fabrication'19995,903,493'Metal to metal capacitor apparatus and method for making'19995,879,997'Method for forming self aligned polysilicon contact'19995,880,022'Self-aligned contact window'19995,679,589'FET with gate spacer'19975,656,822'Thin film transistor having increased effective channel width'19975,654,240'Integrated circuit fabrication having contact opening'19975,625,200'Complementary TFT devices with diode-effect elimination means independent of TFT-channel geometry'19975,599,730'Poly-buffered LOCOS'19975,591,674'Integrated circuit with silicon contact to silicide'19975,559,052'Integrated circuit fabrication with interlevel dielectric'19965,521,861'High-speed high-density SRAM cell'19965,488,248'Memory integrated circuit'19965,468,669'Integrated circuit fabrication'19955,438,006'Method of fabricating gate stack having a reduced height'19955,431,770'Transistor gate formation'19955,420,058'Method of making field effect transistor with a sealed diffusion junction'19955,418,173'Method of reducing ionic contamination in integrated circuit fabrication'19955,416,033'Integrated circuit and manufacture'19955,411,899'Transistor fabrication of a twin tub using angled implant'19955,407,859'Field effect transistor with landing pad'19955,399,532'Integrated circuit window etch and planarization'19955,395,787'Method of manufacturing shallow junction field effect transistor'19955,353,245'Memory integrated circuit with balanced resistance'19945,334,541'Method of fabricating an integrated circuit with lines of critical width extending in the astigmatically preferred direction of the lithographic tool'19945,278,096'Transistor fabrication method'19945,215,930'Integrated circuit etching of silicon nitride and polysilicon using phosphoric acid'19935,185,291'Method of making severable conductive path in an integrated-circuit device'19935,153,145'FET with gate spacer'19925,128,738'Integrated circuit'19925,066,998'Severable conductive path in an integrated-circuit device'1991RE033622'Integrated circuits having stepped dielectric regions'19915,025,300'Integrated circuits having improved fusible links'19915,002,898'Integrated-circuit device isolation'19914,952,524'Semiconductor device manufacture including trench formation'19904,935,376'Making silicide gate level runners'19904,922,311'Folded extended window field effect transistor'19904,844,776'Method for making folded extended window field effect transistor'19894,676,869'Integrated circuits having stepped dielectric regions'19874,641,420'Metalization process for headless contact using deposited smoothing material'1987Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1987–1994Patents assigned to AT & T BELL LAB (13)· patent assignee history
1987–1990Patents assigned to AMERICAN TELEPHONE & TELEGRAPH (3)· patent assignee history
1987–1999Based in Lower Macungie Township, Lehigh County, PA, US· patent location history
1991–1997Based in Wescosville, PA, US· patent location history
1994–1999Based in Macungie, PA, US· patent location history
1995–1996Patents assigned to AT & T CORP (12)· patent assignee history
1996–1999Patents assigned to LUCENT TECHNOLOGIES INC (12)· patent assignee history
1996–2002Based in Orlando, FL, US· patent location history
2001–2002Patents assigned to AGERE SYST GUARDIAN CORP (3)· patent assignee history
2014Based in New Taipei, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| AT & T BELL LAB | 13 | 1987–1994 |
| AT & T CORP | 12 | 1995–1996 |
| LUCENT TECHNOLOGIES INC | 12 | 1996–1999 |
| AGERE SYST GUARDIAN CORP | 3 | 2001–2002 |
| AMERICAN TELEPHONE & TELEGRAPH | 3 | 1987–1990 |
Locations
| Location | Patents | Span |
|---|---|---|
| Lower Macungie Township, Lehigh County, Pennsylvania, US | 18 | 1987–1999 |
| Wescosville, Pennsylvania, US | 12 | 1991–1997 |
| Orlando, Florida, US | 10 | 1996–2002 |
| Macungie, Pennsylvania, US | 3 | 1994–1999 |
| New Taipei, TW | 1 | 2014 |