Inventor

Richard B. Gillett, Jr.

Inventor

Westford, MA, US

Overview

23→

Patents

1988–2016

Patent span

Physics

Primary field (CPC G)

Patents· 23 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing81%

H04LTransmission of digital information, e.g. telegraphic communication12%

H04NPictorial communication, e.g. television4%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use4%

PatentTitleYear

9,286,298'Methods for enhancing management of backup data sets and devices thereof'2016 8,417,746'File system management with enhanced searchability'2013 6,374,336'Computer system and process for transferring multiple high bandwidth streams of data between multiple storage units and multiple applications in a scalable and reliable manner'2002 6,295,585'High-performance communication method and apparatus for write-only networks'2001 6,049,889'High performance recoverable communication method and apparatus for write-only networks'2000 5,924,122'Method for error recovery spinlock in asymmetrically accessed multiprocessor shared memory'1999 5,829,051'Apparatus and method for intelligent multiple-probe cache allocation'1998 5,426,741'Bus event monitor'1995 5,341,510'Commander node method and apparatus for assuring adequate access to system resources in a multiprocessor'1994 5,146,563'Node with coupling resistor for limiting current flow through driver during overlap condition'1992 5,111,424'Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfer'1992 5,068,781'Method and apparatus for managing multiple lock indicators in a multiprocessor computer system'1991 5,034,883'Lockhead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers'1991 5,003,467'Node adapted for backplane bus with default control'1991 4,980,854'Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers'1990 4,949,239'System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system'1990 4,947,368'Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers'1990 4,941,083'Method and apparatus for initiating interlock read transactions on a multiprocessor computer system'1990 4,937,733'Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system'1990 4,858,116'Method and apparatus for managing multiple lock indicators in a multiprocessor computer system'1989 4,837,736'Backplane bus with default control'1989 4,829,515'High performance low pin count bus interface'1989 4,774,422'High speed low pin count bus interface'1988

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1988–2000Patents assigned to DIGITAL EQUIPMENT CORP (18)· patent assignee history

1988–2016Based in Westford, MA, US· patent location history

1999–2001Patents assigned to COMPAQ COMPUTER CORP (2)· patent assignee history

2002Patents assigned to AVID TECHNOLOGY INC (1)· patent assignee history

2013–2016Patents assigned to F5 NETWORKS INC (2)· patent assignee history

2013Patents assigned to BERGER MICHAEL A (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
DIGITAL EQUIPMENT CORP	18	1988–2000
COMPAQ COMPUTER CORP	2	1999–2001
F5 NETWORKS INC	2	2013–2016
AVID TECHNOLOGY INC	1	2002
BERGER MICHAEL A	1	2013

Locations

Location	Patents	Span
Westford, Massachusetts, US	23	1988–2016