Inventor

David Puffer

Inventor
Tempe, AZ, US

Overview

39→
Patents
1999–2021
Patent span
Physics
Primary field (CPC G)

Patents· 39 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing45%
G06TImage data processing or generation, in general25%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use10%
G09GArrangements or circuits for control of indicating devices using static means to present variable information8%
H04LTransmission of digital information, e.g. telegraphic communication8%
G05DSystems for controlling or regulating non-electric variables1%
G11CStatic stores1%
H05KPrinted circuits1%
PatentTitleYear
11,010,163Hierarchical general register file (GRF) for execution block202110,997,686Workload scheduling and distribution on a distributed graphics device202110,990,409Control flow mechanism for execution of graphics processor instructions using active channel packing202110,949,945Coarse grain coherency202110,922,161Apparatus and method for scalable error detection and reporting202110,908,939Efficient fine grained processing of graphics workloads in a virtualized environment202110,831,483Memory mapped virtual doorbell mechanism202010,783,084Sector cache for compression202010,769,078Apparatus and method for memory management in a graphics processing environment202010,726,517Page faulting and selective preemption202010,719,447Cache and compression interoperability in a graphics processor pipeline202010,706,493Apparatus and method for display virtualization using mapping between virtual and physical display planes202010,657,618Coarse grain coherency202010,649,956Engine to enable high speed context switching via on-die storage202010,579,382Method and apparatus for a scalable interrupt infrastructure202010,565,676Thread prefetch mechanism202010,521,271Hybrid low power homogenous grapics processing units201910,503,652Sector cache for compression201910,423,415Hierarchical general register file (GRF) for execution block201910,380,039Apparatus and method for memory management in a graphics processing environment201910,373,285Coarse grain coherency201910,282,812Page faulting and selective preemption20199,542,336'Isochronous agent data pinning in a multi-level memory system'20178,924,756'Processor core with higher performance burst operation with lower power dissipation sustained workload mode'20148,656,069'Peripheral interface alert message for downstream device'20148,346,992'Peripheral interface alert message for downstream device'20137,979,608'Lane to lane deskewing via non-data symbol processing for a serial point to point link'20117,970,958'Peripheral interface alert message for downstream device'20117,913,001'Lane to lane deskewing via non-data symbol processing for a serial point to point link'20117,631,118'Lane to lane deskewing via non-data symbol processing for a serial point to point link'20097,339,995'Receiver symbol alignment for a serial point to point link'20087,327,370'Memory controller hub interface'20087,178,045'Optimizing exit latency from an active power management state'20077,120,765'Memory transaction ordering'20067,116,331'Memory controller hub interface'20066,871,119'Filter based throttling'20056,734,862'Memory controller hub'20046,125,425'Memory controller performing a mid transaction refresh and handling a suspend signal'20005,901,298'Method for utilizing a single multiplex address bus between DRAM, SRAM and ROM'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2021Patents assigned to INTEL CORP (36)· patent assignee history
1999–2021Based in Tempe, AZ, US· patent location history
2011–2014Patents assigned to MICRON TECHNOLOGY INC (3)· patent assignee history
2013–2020Patents assigned to PUFFER DAVID (3)· patent assignee history
2020Patents assigned to APPU ABHISHEK R (1)· patent assignee history
2020Patents assigned to BAR ON TOMER (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP361999–2021
MICRON TECHNOLOGY INC32011–2014
PUFFER DAVIDself32013–2020
APPU ABHISHEK R12020
BAR ON TOMER12020
Locations
LocationPatentsSpan
Tempe, AZ, US391999–2021