Inventor
Chih-Hsiang Yao
Inventor
Taipei, TW
Overview
Patents· 35 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1056%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
H01LSemiconductor devices12%
G06FElectric digital data processing8%
B28DWorking stone or stone-like materials2%
H01JElectric discharge tubes or discharge lamps2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
10,872,806Semiconductor device and manufacturing method thereof202010,169,506Circuit design method and system201910,170,355Semiconductor device and manufacturing method thereof20199,793,212'Interconnect structures and methods of forming same'20179,711,391'Semiconductor device and manufacturing method thereof'20179,477,803'Method of generating techfile having reduced corner variation value'20169,437,485'Method for line stress reduction through dummy shoulder structures'20169,209,079'Conductor layout technique to reduce stress-induced void formations'20158,836,141'Conductor layout technique to reduce stress-induced void formations'20148,692,351'Dummy shoulder structure for line stress reduction'20148,669,661'Metal line and via formation using hard masks'20148,450,200'Method for stacked contact with low aspect ratio'20138,435,802'Conductor layout technique to reduce stress-induced void formations'20137,880,303'Stacked contact with low aspect ratio'20117,791,070'Semiconductor device fault detection system and method'20107,777,338'Seal ring structure for integrated circuit chips'20107,772,701'Integrated circuit having improved interconnect structure'20107,741,714'Bond pad structure with stress-buffering layer capping interconnection metal layer'20107,592,710'Bond pad structure for wire bonding'20097,470,994'Bonding pad structure and method for making the same'20087,265,436'Non-repeated and non-uniform width seal ring structure'20077,253,531'Semiconductor bonding pad structure'20077,244,673'Integration film scheme for copper / low-k interconnect'20077,151,052'Multiple etch-stop layer deposition scheme and materials'20067,098,077'Semiconductor chip singulation method'20067,081,679'Structure and method for reinforcing a bond pad on a chip'20067,074,629'Test patterns for measurement of effective vacancy diffusion area'20067,042,097'Structure for reducing stress-induced voiding in an interconnect of integrated circuits'20066,927,498'Bond pad for flip chip package'20056,864,701'Test patterns for measurement of effective vacancy diffusion area'20056,831,365'Method and pattern for reducing interconnect failures'20046,812,069'Method for improving semiconductor process wafer CMP uniformity while avoiding fracture'20046,787,803'Test patterns for measurement of low-k dielectric cracking thresholds'20046,787,484'Method of reducing visible light induced arcing in a semiconductor wafer manufacturing process'20046,759,342'Method of avoiding dielectric arcing'2004Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004–2014Patents assigned to TAIWAN SEMICONDUCTOR MFG (27)· patent assignee history
2004–2020Based in Taipei, TW· patent location history
2004–2015Based in Hsinchu, TW· patent location history
2004Based in Hsin Chu, TW· patent location history
2013–2014Patents assigned to YAO CHIH-HSIANG (4)· patent assignee history
2013–2014Patents assigned to CHENG JYE-YEN (2)· patent assignee history
2014Patents assigned to CHANG KEN-YU (1)· patent assignee history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (8)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 27 | 2004–2014 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 8 | 2015–2020 |
| YAO CHIH-HSIANGself | 4 | 2013–2014 |
| CHENG JYE-YEN | 2 | 2013–2014 |
| CHANG KEN-YU | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Taipei, TW | 25 | 2004–2020 |
| Hsinchu, TW | 9 | 2004–2015 |
| Hsin Chu, TW | 1 | 2004 |