LexDanaLexDanabeta
Inventor

Hideki Arakawa

Inventor
Yokohama, JP

Overview

58→
Patents
1981–2017
Patent span
Physics
Primary field (CPC G)

Patents· 58 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores53%
H10BElectronic memory devices10%
H10DInorganic electric semiconductor devices10%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems8%
G05FSystems for regulating electric or magnetic variables4%
H03KPulse technique4%
G01RMeasuring electric variables2%
G06FElectric digital data processing2%
H01LSemiconductor devices2%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%
PatentTitleYear
9,537,398'Voltage generating circuit and regulator circuit for precisely control predetermined high voltage'20179,502,969'Negative reference voltage generating circuit'20169,397,562'Negative reference voltage generating circuit and system thereof'20169,299,578'Transistor formation method using sidewall masks'20169,214,242'Programming method for NAND flash memory device to reduce electrons in channels'20159,076,546'Nonvolatile semiconductor storage device and control method thereof'20159,064,580'Nonvolatile semiconductor memory device and write-in method thereof'20158,599,614'Programming method for NAND flash memory device to reduce electrons in channels'20138,131,954'Memory device and data reading method'20127,903,470'Integrated circuits and discharge circuits'20117,881,142'Storage device and control method thereof'20117,778,087'Memory programming method and data access method'20107,501,677'SONOS memory with inversion bit-lines'20097,385,844'Semiconductor device and method of controlling the same'20087,372,743'Controlling a nonvolatile storage device'20087,362,620'Semiconductor device and method of controlling the same'20087,321,511'Semiconductor device and method for controlling operation thereof'20087,274,602'Storage device and control method therefor'20077,151,293'SONOS memory with inversion bit-lines'20067,096,406'Memory controller for multilevel cell memory'20066,385,088'Non-volatile memory device'20026,208,200'Level shift circuit with low voltage operation'20015,883,501'Power supply circuit'19995,590,073'Random access memory having flash memory'19965,489,870'Voltage booster circuit'19965,459,694'Nonvolatile storage apparatus with folded bit line structure'19955,396,459'Single transistor flash electrically programmable memory cell in which a negative voltage is applied to the nonselected word line'19955,388,078'Semiconductor memory device having current to voltage conversion type amplifier'19955,253,200'Electrically erasable and programmable read only memory using stacked-gate cell'19935,198,997'Ultraviolet erasable nonvolatile memory with current mirror circuit type sense amplifier'19935,189,641'Non-volatile random access memory device'19935,136,541'Programmable read only memory using stacked-gate cell erasable by hole injection'19925,099,143'Dual voltage supply circuit with multiplier-controlled transistor'19925,051,958'Nonvolatile static memory device utilizing separate power supplies'19915,039,882'Address decoder circuit for non-volatile memory'19915,029,132'Random access memory device having parallel non-volatile memory cells'19914,878,203'Semiconductor non-volatile memory with cut-off circuit when leakage occurs'19894,817,055'Semiconductor memory circuit including bias voltage generator'19894,800,533'Semiconductor nonvolatile memory device'19894,799,194'Semiconductor random access nonvolatile memory device with restore and control circuits'19894,791,614'Semiconductor memory device having erroneous write operation preventing function'19884,744,058'Semiconductor programmable memory device and method of writing a predetermined pattern to same'19884,703,196'High voltage precharging circuit'19874,703,456'Non-volatile random access memory cell'19874,699,690'Method of producing semiconductor memory device'19874,682,051'Voltage level detection circuit'19874,677,590'Nonvolatile semiconductor memory circuit including dummy sense amplifiers'19874,644,182'Delay circuit having delay time period determined by discharging operation'19874,636,658'Voltage detecting device'19874,630,238'Semiconductor memory device'19864,601,020'Semiconductor memory device'19864,584,494'Semiconductor timer'19864,503,519'Semiconductor non-volatile memory element of an electrically erasable type'19854,479,126'MIS Decoder circuit'19844,402,064'Nonvolatile memory'19834,368,524'Semiconductor device'19834,355,375'Semiconductor memory device'19824,298,629'Method for forming a nitride insulating film on a silicon semiconductor substrate surface by direct nitridation'1981

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1981–1993Patents assigned to FUJITSU LTD (25)· patent assignee history
1981–2015Based in Yokohama, JP· patent location history
1991–2002Patents assigned to SONY CORP (13)· patent assignee history
1991–2015Based in Kanagawa, JP· patent location history
1995–2017Based in Tokyo, JP· patent location history
2006–2011Patents assigned to SPANSION LLC (9)· patent assignee history
2006–2016Based in Kawasaki, JP· patent location history
2012–2016Patents assigned to POWERCHIP TECHNOLOGY CORP (6)· patent assignee history
2012–2016Patents assigned to ARAKAWA HIDEKI (4)· patent assignee history
2015Based in Hsinchu, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
FUJITSU LTD251981–1993
SONY CORP131991–2002
SPANSION LLC92006–2011
POWERCHIP TECHNOLOGY CORP62012–2016
ARAKAWA HIDEKIself42012–2016
Locations
LocationPatentsSpan
Yokohama, JP301981–2015
Kanagawa, JP161991–2015
Tokyo, JP51995–2017
Kawasaki, JP52006–2016
Hsinchu, TW12015